United Microelectronics Corp.

Bing Xu Precision Co., Ltd.

Ying Hao Technology Co., Ltd.

Dairen Chemical Corporation

Inventec Corp.

Energy Full Electronics

Chih-Jung Chen

Hung-Hsun Shuai

Yu-Jen Yeh

Tzu-Ping Chen

Chih-Chung Huang

Chien-Hung Chen

Chih-Yueh Li

Cheng-Pu Chiu

Fu-Shen Lin

June-Yen Chou

Hsing-Yun Wang

Wei-Sheng Chia

Chung-An Chen

Wei-Lun Hsieh

Chi-Ying Hsieh

Shih-Min Lu

Yung-Sung Lin

Wen-Lung Lin

Yu-Huan Liu

A semiconductor memory device includes a substrate, a plurality of memory cells and at least one strap cell between the plurality of memory cells disposed along a first direction, a plurality of bit line (BL) contacts electrically connected to a plurality of drain doped regions of the plurality of memory cells, respectively, and at least one source line contact electrically connected to a diffusion region of the strap cell. The at least one source line contact is aligned with the plurality of BL contacts in the first direction.

Semiconductor memory device having a symmetric active area layout structure

A structure of flash memory cell includes a substrate. A floating gate is disposed on the substrate. A low dielectric constant (low-K) spacer is disposed on a sidewall of the floating gate. A trench isolation structure has a base part disposed in the substrate and a protruding part above the substrate protruding from the base part. The low-K spacer is sandwiched between the floating gate and the protruding part of the trench isolation structure.

Structure of flash memory cell

A flexible flat cable includes an upper bonding adhesive layer and a lower bonding adhesive layer bonded together, a plurality of bare wires being sandwiched, an upper metal shielding layer located on an upper side of the upper bonding adhesive layer and adhesively attached to the upper bonding adhesive layer, and a lower metal shielding layer located on a lower side of the lower bonding adhesive layer and adhesively attached to the lower side of the lower bonding adhesive layer.

Flexible flat cable

An insert molded connector includes a plurality of wires arranged in parallel, a coating insulating layer, and a tongue. The plurality of wires are configured to transmit electrical signals. The coating insulating layer covers main portions of the wires to expose the contact portions of the wires. The tongue is insert molded to cover the contact portion and a portion of the coating insulating layer close to the contact portion to expose a contact surface of the contact portion.

Insert molded connector

A memory cell includes a substrate, a floating gate on the substrate, a control gate on the floating gate, a first dielectric layer between the floating gate and the control gate, an erase gate merged with the control gate and disposed on a first sidewall of the floating gate, a second dielectric layer between the floating gate and the erase gate, a select gate on an opposite second sidewall of the floating gate, a spacer between the select gate and the control gate and between the select gate and the floating gate, a source doping region in the substrate and adjacent to the first sidewall of the floating gate, and a drain doping region in the substrate and adjacent to the select gate.

Semiconductor memory device

Structure of flash memory cell and method for fabricating the same

A connector assembly includes a connector and a flat cable. The connector includes a first terminal, a second terminal, a first body, a second body, a metal plate, a third body, and a shell. The first and second terminals electrically connect a first side and a second side of the flat cable respectively and are respectively contained in a first capacity slot and a first through-hole of the first body and in a second capacity slot and a second through-hole of the second body. The first and second bodies clamp the metal plate. The third body partly winds and fixes the first body and the second body, and protects a terminal conductive contact part of the flat cable connected by the first and second terminals to form the connector. The flat cable connects to the connector directly. There is no need for a fixed rigid printed circuit board.

Connector assembly directly connected to a flat cable

A semiconductor memory device includes a substrate, an isolation layer, a trench, a semiconductor active structure, and a floating gate electrode. The isolation layer is disposed on the substrate. The trench penetrates through the isolation layer and exposes a part of the substrate. The semiconductor active structure is disposed in the trench, and the floating gate electrode is disposed on the semiconductor active structure. A manufacturing method of the semiconductor memory device includes the following steps. The isolation layer is formed on the substrate. The trench is formed penetrating through the isolation layer and exposing a part of the substrate. The semiconductor active structure is formed in the trench. The floating gate electrode is formed on the semiconductor active structure.

Manufacturing method of semiconductor memory device

A semiconductor memory device includes a substrate having a first active area and a second active area in proximity to the first active area. A trench isolation region is between the first active area and the second active area. A source line region is disposed in the first active area and adjacent to the trench isolation region. An erase gate is disposed on the source line region. A floating gate is disposed on a first side of the erase gate. A first control gate is disposed on the floating gate. A first word line is disposed adjacent to the floating gate and the first control gate and insulated therefrom. A second control gate is disposed on a second side of the erase gate and directly on the trench isolation region. A second word line is disposed adjacent to the second control gate and insulated therefrom.

Method of fabricating semiconductor memory device

An NVM device includes a semiconductor substrate, a first floating gate, a first control gate, a first drain region, and a common source region. The semiconductor substrate has a recess extending downward from the substrate surface. The first floating gate is disposed in the recess, has a base and a side wall connecting to the base. The first control gate is disposed on and adjacent to the first floating gate. The first drain region is disposed in the semiconductor substrate in the recess. The common source region is formed in the semiconductor substrate in the recess, is adjacent to the first floating gate, and includes a main body and an extension part. The main body is disposed below a bottom surface of the recess and adjacent to the base. The extension part extends upward from the bottom surface beyond the base to be adjacent to the side wall.

Non-volatile memory device and method for fabricating the same

Semiconductor memory device and fabrication method thereof

Semiconductor memory device and manufacturing method thereof

Method for fabricating flash memory

A connector includes a shell configured to protect the connector and to be plugged into a connecting port slot, a plurality of terminals electrically connected to the connecting port slot, a connecting portion connected to an electronic device, a circuit board, and a cover. The circuit board includes a first contact portion electrically connected to the plurality of terminals, and a second contact portion, electrically connected to the connecting portion. The cover is fixed to the shell. The shell is arranged between the circuit board and the shell to fix the circuit board in the shell.

Connector

A polycarbonate diol is provided, including three kinds of repeating diol units, wherein one of the repeating diol units is chosen from an alkoxylated diol monomer.

Growing community of inventors

Taipei, Taiwan

Chih-Jung Chen