Faraday Technology Corporation

Atomic Energy Council-institute of Nuclear Energy Research

Kingston Digital, Inc.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Industrial Technology Research Institute

Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan

Macronix International Co., Ltd.

Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.o.c

Atomic Energy Council

Chih-Hung Wu

Ben Wei Chen

Meng-Jer Wey

Kai-Sheng Chang

Hwen-Fen Hong

Hung-Sheng Chiu

Ko-Ching Chao

Hsien-Chih Chang

Chen-Ting Lin

Chieh Cheng

Yi Ting Lin

Min-De Yang

Kuan-Yu Chu

Yu-Li Tsai

Jei-Li Ho

Po-Wen Hsiao

Zhou-Lun Liou

Chung-Hsing Wang

Kuo-Nan Yang

Chih-Yuan Chang

Chih-Cheng Chou

Hung-Yin Tsai

Chia-Hua Chang

Hwa-Yuh Shin

Mei-Yen Li

Yu-Wei Lee

Chien-Hui Chuang

Jung-Tsung Hsu

Yu-Jen Chang

Chang-An Ho

Yen-Chang Tzeng

Yi-Cheng Peng

Ying-Ru Chen

Sheau-Yung Shyu

Chia-Chun Liu

Chih-Yung Cheng

Pei-Hsuan Wu

Keng-Shen Liu

Chun-Ling Chang

Wen-Hsiang Huang

Yen-Cheng Tzeng

Chan-Wei Yeh

Hwa-Yuh Shih

Kuo-Rong Hsiao

Chao-Huei Huang

Yu-Chieh Ma

Jui-Jung Hsu

Chih-Hung Chiou

Shang-Fu Chen

I-Liang Chen

Andrew-Yen C Tzeng

A method and apparatus for performing self-calibration of receiver offset without shorting differential input terminals of a receiver are provided. The self-calibration includes: inputting input signals carrying predetermined data patterns into a plurality of receivers; performing data eye width measurement on the input signals received by the plurality of receivers to obtain multiple first data eye widths and multiple second data eye widths respectively corresponding to first and second data bytes; performing first offset calibration to make the multiple first data eye widths converge to a first common data eye width; performing second offset calibration to make the multiple second data eye widths be equal to the multiple first data eye widths, respectively, and converge to the first common data eye width; and performing reference voltage calibration on a reference voltage to optimize the multiple first data eye widths and the multiple second data eye widths.

Apparatus and method for performing self-calibration of receiver offset without shorting differential input terminals of receiver

Security functions for a memory corresponding to a smart security storage may be facilitated or executed through operation of utility application corresponding to a smart device. For example, encryption/decryption of data stored on the memory may be facilitated or executed by a security module under control of an access application corresponding to the smart device. Data securely stored on the memory may be explored and accessed by the smart device or a host computing device under control of the access application.

Smart security storage system

Smart security storage

A method for performing divided-clock phase synchronization in a multi-divided-clock system, an associated synchronization control circuit, an associated synchronization control sub-circuit and an associated electronic device are provided. The method may include: performing frequency division operations according to a source clock to generate a first divided clock and a second divided clock; performing phase relationship detection on the first divided clock according to the second divided clock to generate a phase relationship detection result signal; performing a logic operation on a first phase selection result output signal and the phase relationship detection result signal to generate a second phase selection result output signal; and outputting one of the second divided clock and an inverted signal of the second divided clock according to the second phase selection result output signal, for further use in a physical layer circuit.

Method for performing divided-clock phase synchronization in multi-divided-clock system, synchronization control circuit, synchronization control sub-circuit, and electronic device

An input/output module electrically coupled between a control circuit and an input/output pin is provided. The input/output module includes a pre-driver and a post-driver. The pre-driver is electrically coupled to the control circuit, and the post-driver is electrically coupled between the pre-driver and the input/output pin. The pre-driver generates a pull-up selection signal and a pull-down selection signal according to an input signal and an enable signal generated by the control circuit. The post-driver sets a voltage level of the input/output pin according to the pull-up and pull-down selection signals. When the enable signal is at a first logic level, the input/output pin has a high impedance. When the enable signal is at a second logic level, the voltage level of the input/output pin changes with a logic level of the input signal, wherein the first logic level and the second logic level are inverted.

Input/output module

The present invention provides a method for fabricating an InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD). The method comprises: placing a silicon substrate in a reaction chamber; arranging the reaction chamber to have a first chamber temperature, and growing a first GaP layer with a first thickness on the Si substrate at the first chamber temperature; arranging the reaction chamber to have a second chamber temperature, and growing a second GaP layer with a second thickness on the first GaP layer at the second chamber temperature; arranging the reaction chamber to have a third chamber temperature for a first time interval, and then arranging the reaction chamber to have a fourth chamber temperature for a second time interval; and growing a multi-layered InGaP layer on the second GaP layer.

Method for fabricating InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD)

A portable data transmitting device, including a storage portion and a movable portion, is disclosed. The storage portion includes a fixed housing including a first side and a second side, and a first plug connector disposed on the first side. The movable portion includes a rotatable housing that is rotatably disposed on the second side of the fixed housing, a slidable housing that includes a first side and is slidably disposed on the rotatable housing, and a second plug connector disposed on the first side of the slidable housing. Thereby, the portable data transmitting device can be attached to portable apparatuses with different thicknesses, and can abut on the portable apparatus so as not to wobble or be bent easily.

Portable data transmitting device

An integrated circuit (IC) design method is disclosed. The method includes: using a computer to perform synthesis upon a register transfer level (RTL) IC design to generate a gate level netlist; performing place and route (P&R) upon the gate level netlist to generate a layout; determining a sink current distribution information of the layout; and generating a voltage (IR) drop/electro-migration (EM) analysis result of the layout according to the sink current distribution information; wherein the layout includes a cell having a cell height that is N times higher than a single cell height, where N is an integer and greater than 1, and the cell corresponds to N power/ground (P/G) rail sets; wherein the sink current distribution information includes a proportion of a sink current flowing through each of the N power/ground (P/G) rail sets with respect to the cell when operated. Associated non-transitory computer-readable medium is also disclosed.

Integrated circuit design method and associated non-transitory computer-readable medium

A Double Data Rate (DDR) gating method is applied to a memory controller of an associated DDR gating apparatus. The DDR gating method includes: outputting from the memory controller an outward clock signal to a memory, and receiving from the memory a backward clock signal corresponding to the outward clock signal, wherein the backward clock signal is utilized as reference for a data read operation of the memory controller with respect to the memory; and providing an input stage of the memory controller with a reference signal to generate, through single ended receiving of the input stage, gating-related information for performing gating when sampling the backward clock signal, and lengthening time of a preamble of the backward clock signal with aid of the single ended receiving of the input stage, for increasing a detection margin of the preamble.

Double data rate gating method and apparatus with real-time detection capability for performing gating to improve the efficiency of memory access control

Data accessing device

A bend sensor for a flexible display panel is provided. The bend sensor includes plural detecting electrodes and a controlling circuit. The plural detecting electrodes are disposed on a touch panel. The touch panel is attached on the flexible display panel. The plural detecting electrodes generate plural detecting signals according to a change of an electric field or a magnetic field. The controlling circuit receives the plural detecting signals and judges a bending status of the flexible display panel according to the plural detecting signals.

Bend sensor, bend sensing method and bend sensing system for flexible display panel

A simulated sunlight generating device for generating a simulated sunlight required for evaluating performance of solar cells includes a plurality of driving units, a plurality of light-emitting units, and a plurality of adjusting units. The driving units drive the light-emitting units to emit light. The adjusting units enable the light of the light-emitting units to not only propagate along the same light route but also be added up and combined to form the simulated sunlight of an intended wavelength with ease of installation, ease of maintenance, low costs, high flexibility, and high efficiency.

Simulated sunlight generating device

The present invention related to a lift-off structure adapted to a substrate having a photoelectric device, the structure comprising: a buffer layer, forming on the substrate; an upper sacrificial layer, forming on the buffer layer; an etch stop layer, forming on the upper sacrificial layer, and the photoelectric device structure forming on the etch stop layer.

Lift-off structure for substrate of a photoelectric device and the method thereof

A lift-off structure for substrate of a photoelectric device and method thereof, which making it possible to enable an etching solution to flow through not only external etch channel but also internal etch channel to etch a sacrificial layer in order to increase the overall etching speed and decrease the overall time of lifting a substrate off.

Lift-off structure for substrate of a photoelectric device and method thereof

Growing community of inventors

Taoyuan, Taiwan

Chih-Hung Wu