Industrial Technology Research Institute

Chih-Hung Lin

Jiunn-Tsair Chen

Chin-Fu Li

Chia-Jen Yu

An echo cancellation circuit for an RFID reader and the method thereof are provided. The echo cancellation circuit includes a gain calculator, a gain adjustment circuit, and a subtraction circuit. The gain calculator provides a complex gain value according to a carrier signal and a received signal through an adaptive algorithm. The gain adjustment circuit is coupled to the gain calculator. The gain adjustment circuit multiplies the carrier signal by the complex gain value, and outputs the result of the multiplication. The subtraction circuit is coupled to the gain adjustment circuit. The subtraction circuit subtracts the output of the gain adjustment circuit from the received signal, and then provides the result of the subtraction as the output signal of the echo cancellation circuit.

RFID reader and circuit and method for echo cancellation thereof

A method and a system for reading radio frequency identification (RFID) tags are provided. The method includes the following steps. First, receive a tag signal from the RFID tag. Recover a data clock rate from the tag signal according to statistics of pulse lengths of the tag signal. Next, determine a frame synchronization point of a data frame following a preamble in the tag signal by a signal correlation between the preamble and a predetermined signal pattern according to the data clock rate. Finally, decode the data frame by using an adaptive Viterbi algorithm on an extended trellis diagram. The extended trellis diagram includes a plurality of nodes and a plurality of branches connecting the nodes. The nodes and the branches are arranged according to the modulation scheme of the data frame and possible variations of the data clock rate.

Method and system for reading RFID tags

A digital adaptive predistorter look up table (DAPD-LUT) technique dynamically adapts a look up table (LUT) an LUT spacing for linearizing a power amplifier (PA). It optimizes the LUT spacing for the PA without prior knowledge of system state information. A size-N LUT divides a whole unsaturated PA input amplitude range into N bins, each predistorted by an entry of the LUT. The LUT is indexed by an input amplitude of a modulated signal via an index mapper to implement an unconditionally non-uniform LUT spacing. A spacing adaptor online interactively adapts the LUT spacing. The adapted LUT spacing balances the inter-modulation distortion (IMD) power at the PA output corresponding to each bin, so that the total IMD power at the PA output is minimized. This dynamically-optimum technique is practical, robust, and with low complexity.

Apparatus and method of dynamically adapting the LUT spacing for linearizing a power amplifier

A printed circuit unit implementing with organic transistors is provided. The printed circuit unit includes an input signal circuit, a load circuit and a level shifter. The input signal circuit includes N serially connected organic transistors. When one of the serially connected organic transistors is cut-off, the signal input circuit is cut-off, so that the circuit is maintained to output a correct voltage level. The level shifter circuit includes an organic transistor having a gate for receiving the input signal. The organic transistor can also serve as a load for improving a gain of the level shifter.

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Tainan County, Taiwan

Chih-Hung Lin