Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Hung Hsueh

Kuan-Chi Tsai

Shao-Yu Chen

Yen-Hsiang Hsu

Chun-Liang Fan

Chung-Chen Yu

Wei-Te Wang

Shih-Chuan Lin

Chien-Chiang Lin

Zhi-Xioung Hu

A method for performing a wet chemical process over a semiconductor wafer is provided. The method includes moving the semiconductor wafer into a chemical solution. The method further includes detecting the concentration of at least one substance in the chemical solution at a plurality of preset time points. The method also includes removing the semiconductor wafer from the chemical solution, when the concentration of the substance is maintained at a fixed approximate value.

Method and system for wet chemical bath process

Embodiments of mechanisms for forming a semiconductor device structure are provided. The semiconductor device structure includes a metal-insulator-metal (MIM) capacitor formed on a substrate. The semiconductor device structure also includes an inductor formed on the MIM capacitor. The semiconductor device structure further includes a via formed between the MIM capacitor and the inductor, and the via is formed in a plurality of dielectric layers, and the dielectric layers comprise an etch stop layer.

Interconnection between inductor and metal-insulator-metal (MIM) capacitor

The present disclosure relates to an integrated chip (IC) having an ultra-thick metal layer formed in a metal layer trench having a rounded shape that reduces stress between an inter-level dielectric (ILD) layer and an adjacent metal layer, and a related method of formation. In some embodiments, the IC has an inter-level dielectric layer disposed above a semiconductor substrate. The ILD layer has a cavity with a sidewall having a plurality of sections, wherein respective sections have different slopes that cause the cavity to have a rounded shape. A metal layer is disposed within the cavity. The rounded shape of the cavity reduces stress between the ILD layer and the metal layer to prevent cracks from forming along an interface between the ILD layer and the metal layer.

Process of ultra thick trench etch with multi-slope profile

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Tainan, Taiwan

Chih-Hung Hsueh