Taiwan Semiconductor Manufacturing Comp. Ltd.

National Yang Ming Chiao Tung University

Other

Chih Hung Chen

Kei-Wei Chen

Liang-Guang Chen

William Weilun Hong

Te-Chien Hou

King-Ning Tu

Ying-Lang Wang

Chun-Chieh Lin

Shich-Chang Suen

Fu-Ming Huang

Cheng-Yu Kuo

Te-Ming Kung

Ting-Hsun Chang

Yu-Ting Yen

I-Shuo Liu

Wei-Lan Chiu

Ji James Cui

Kuanhua Su

Chih-Chun Hsia

Kai-Cheng Shie

Hsin-Ying Ho

Kao-Feng Liao

Peng-Chung Jangjian

Ji Cui

Chun-Wen Hsiao

Jing-Ye Juang

Sheng-Chao Chuang

Yi-Chia Chou

Hsiang-Yao Hsiao

Wen-Pin Liao

Michael Yen

Hsin-Ting Chou

Kang-Ping Lee

Yu-Jin Li

Taochi Liu

Chyi Shyuan Chern

Ying-Tsung Chen

Yu-Ting Cheng

Keith Kuang-Kuo Koai

Chi-Hsiang Shen

Po-Chin Nien

Tzu Kai Lin

Hung Yen

Chia-Hsun Chang

Tzu-Yuan Chao

Hsin Ting Chou

Chien-Min Lin

Ming-Chieh Hsu

Chia-Ling Lu

Nan-Yow Chen

Yu-Chieh Lo

Tsung Hsien Chang

Han-Wen Lin

Kang Huang

Yun-Hsuan Chen

Yu-I Chang

Hsiang-Hou Tseng

A chemical mechanical polishing device is provided according to some embodiments. The chemical mechanical polishing device comprises a polishing pad. The polishing pad includes a plurality of stacks of first pad fractions and a plurality of stacks of second pad fractions. The first pad fractions and the second pad fractions have different hardness. The stacks of first pad fractions and the stacks of the second pad fractions are arranged with a pattern corresponding to a predetermined feature of a structure to be polished by the chemical mechanical polishing device. The predetermined feature may include a surface profile or a material of the structure to be polished.

Semiconductor device fabrication methods and devices for forming the same

Embodiments of the present disclosure relate a CMP tool and methods for planarization a substrate. Particularly, embodiments of the present disclosure provide a substrate transporter for use in a CMP tool. The transporter may be used transport and/or carry substrates among various polishers and cleaners in a CMP tool while preventing the substrates from drying out during transportation. By keeping surfaces of the substrates wet during substrate waiting time or idle time in the CMP tool, embodiments of the present disclosure prevent many types of defects, such as byproducts, agglomerated abrasives, pad debris, slurry residues, from accumulate on the substrate surface during CMP processing, thus improve yields and device performance.

Apparatus and methods for chemical mechanical polishing

Some implementations described herein relate to dispensing a slurry onto a polishing pad for a chemical-mechanical planarization (CMP) process. These implementations also involve rotating the polishing pad while the slurry is dispensed onto the polishing pad. Rotation of the polishing pad results in a traversal of the slurry radially outward toward a polishing pad outer edge of the polishing pad. The polishing pad includes a plurality of groove segments and a geometric patterns formed by the plurality of the groove segments impede the flow of the slurry to the polishing pad outer edge.

Chemical-mechanical planarization pad and methods of use

A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

CMP system and method of use

A method includes polishing a wafer on a polishing pad, performing conditioning on the polishing pad using a disk of a pad conditioner, and conducting a heat-exchange media into the disk. The heat-exchange media conducted into the disk has a temperature different from a temperature of the polishing pad.

Temperature control in chemical mechanical polish

A method includes forming a first connector and a second connector over a first wafer and a second wafer, respectively, in which each of the first and second connectors are formed by forming an opening in a dielectric layer; depositing a first metal layer in the opening, in which the first metal layer has a nano-twinned structure with (111) orientation; and depositing a second metal layer over the first metal layer, the second metal layer and the first metal layer being made of different materials, in which the second metal layer has a nano-twinned structure with (111) orientation; attaching the first wafer to the second wafer, such that that the second metal layer of the first connector on the first wafer is in contact with the second metal layer of the second connector on the second wafer; and performing a thermo-compression process to bond the first and second wafers.

Connector and method for forming the same

A chemical mechanical planarization system includes a chemical mechanical planarization pad that rotates during a chemical mechanical planarization process. A chemical mechanical planarization head places a semiconductor wafer in contact with the chemical mechanical planarization pad during the process. A slurry supply system supplies a slurry onto the pad during the process. A pad conditioner conditions the pad during the process. An impurity removal system removes debris and impurities from the slurry.

System and method for removing impurities during chemical mechanical planarization

A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.

Hotspot avoidance method of manufacturing integrated circuits

A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Chemical mechanical planarization tool

A method of evaluating a thickness of a film on a substrate includes detecting atomic force responses of the film to exposure of electromagnetic radiation in the infrared portion of the electromagnetic spectrum. The use of atomic force microscopy to evaluate thicknesses of thin films avoids underlayer noise commonly encountered when optical metrology techniques are utilized to evaluate film thicknesses. Such underlayer noise adversely impacts the accuracy of the thickness evaluation.

Thin film metrology

A method of cleaning and polishing a backside surface of a semiconductor wafer is provided. The method includes placing an abrasive brush, comprising an abrasive tape wound around an outer surface of a brush member of the abrasive brush, on the backside surface of the semiconductor wafer. The method also includes rotating the brush member to polish the backside surface of the semiconductor wafer by abrasive grains formed on the abrasive tape and to clean the backside surface of the semiconductor wafer by the brush member which is not covered by the abrasive tape.

Method for wafer backside polishing

A semiconductor processing tool includes a cleaning chamber configured to perform a post-chemical mechanical polishing/planarization (post-CMP) cleaning operation in an oxygen-free (or in a near oxygen-free) manner. An inert gas may be provided into the cleaning chamber to remove oxygen from the cleaning chamber such that the post-CMP cleaning operation may be performed in an oxygen-free (or in a near oxygen-free) environment. In this way, the post-CMP cleaning operation may be performed in an environment that may reduce oxygen-causing corrosion of metallization layers and/or metallization structures on and/or in the semiconductor wafer, which may increase semiconductor processing yield, may decrease semiconductor processing defects, and/or may increase semiconductor processing quality, among other examples.

Semiconductor processing tool and methods of operation

A nano-twinned Cu—Ni alloy layer is provided, wherein more than 50% in volume of the nano-twinned Cu—Ni alloy layer comprises plural twinned grains, the plural twinned grains comprise plural columnar twinned grains, and a Ni content in the nano-twinned Cu—Ni alloy layer is in a range from 0.05 at % to 20 at %. In addition, a method for manufacturing the aforesaid nano-twinned Cu—Ni alloy layer is also provided.

Nano-twinned Cu—Ni alloy layer and method for manufacturing the same

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Hsinchu, Taiwan

Chih Hung Chen