Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Hua Wang

Chu Fu Chen

Chia-Cheng Pao

Chan-Hong Chern

Cheng-Hsiang Hsieh

Yi-An Lai

A method of fabricating a device involves forming a plurality of structures, such that each structure of the plurality includes a substrate and an epitaxial layer on the substrate. The epitaxial layer and the substrate have a lattice mismatch. The method further includes forming an electrical contact on the epitaxial layer of a selected structure of the plurality of structures and performing a current leakage measurement quality control test for the selected structure of the plurality of structures through the electrical contact. The method also involves forming a device on each of the remaining structures of the plurality of structures if the selected structure passed the leakage measurement quality control test or discarding each of the remaining structures of the plurality of structures if the selected structure did not pass the leakage measurement quality control test.

Quality detection method and apparatus

Various embodiments of the present application are directed towards an integrated circuit (IC) including a first switching device, a second switching device, an inductor, and a controller. The inductor is electrically coupled to a first source/drain region of the first switching device and a first source/drain region of the second switching device at a node. The controller is configured to alternatingly change the first and second switching devices between a first state and a second state, respectively. The first switching device is in a third state before or after the second switching device transitions between the first and second states. A subthreshold voltage is applied to a first gate of the first switching device during the third state, such that the third state is between a cutoff mode and a triode mode of the first switching device.

Dead-time conduction loss reduction for buck power converters

Various embodiments of the present application are directed towards a buck converter circuit including a controller circuit. In some embodiments, the buck converter circuit includes a first switching device, a second switching device, an inductor, and a controller. The inductor is electrically coupled to a node at which a source/drain terminal of the first switching device and a source/drain terminal of the second switching device are electrically coupled. The controller is configured to alternatingly change the first switching device between ON and OFF, and further configured to alternatingly change the second switching device between ON and OFF. The first switching device is OFF while the second switching device is ON. The first switching device is partially ON immediately before or after the second switching device transitions between ON and OFF.

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Hsinchu, Taiwan

Chih-Hua Wang