Mediatek Corporation

Chih-Hou Tsai

Chao-Hsin Lu

Ying-Zu Lin

Chin-Yu Lin

Shan-Chih Tsou

Shu-Lin Chang

Wei-Hao Tsai

Rong-Sing Chu

Chien-Yuan Cheng

Ting-Yu Ko

A complementary current-steering digital-to-analog converter (DAC) including a p-type DAC as well as an n-type DAC is shown. The p-type DAC has p-type current sources, and the n-type DAC has n-type current sources. The p-type and n-type current sources are coupled to a first input terminal or a second input terminal of a transimpedance amplifier (TIA) according to the digital input of the complementary current-steering DAC. In response to the digital input changing from a first value to a second value that is greater than the first value, one or more n-type current sources connected to the second input terminal of the TIA are switched so that they are connected to the first input terminal of the TIA.

Complementary current-steering digital-to-analog converter

A time-interleaved noise-shaping successive-approximation analog-to-digital converter (TI NS-SAR ADC) is shown. A first successive-approximation channel has a first set of successive-approximation registers, and a first coarse comparator operative to coarsely adjust the first set of successive-approximation registers. A second successive-approximation channel has a second set of successive-approximation registers, and a second coarse comparator operative to coarsely adjust the second set of successive-approximation registers. A fine comparator is provided to finely adjust the first set of successive-approximation registers and the second set of successive-approximation registers alternately. A noise-shaping circuit is provided to sample residues of the first and second successive-approximation channels for the fine comparator to finely adjust the first and second sets of successive-approximation registers.

Time-interleaved noise-shaping successive-approximation analog-to-digital converter

A noise-shaping successive approximation analog-to-digital converter (NS-SAR ADC) using a passive noise-shaping technique with 1-input-pair SAR comparator is introduced. A residue sampling and integration circuit is coupled between a DAC and the comparator, for sampling a residue voltage generated by the DAC and charge-sharing of the sampled residue voltage. A first integral capacitor is coupled between a first input terminal of a comparator and a first output terminal of a DAC. After a first residue capacitor samples a residue generated by the DAC, the first residue capacitor is coupled to the first integral capacitor for charge-sharing of the residue voltage.

Analog-to-digital converter

A metal-oxide-metal (MOM) capacitor is provided in the present invention. The MOM capacitor includes a capacitor element, wherein the capacitor element includes a first electrode and a second electrode. A projection of the first electrode includes a closed pattern in the vertical projection direction. A projection of the second electrode is surrounded by the closed pattern of the projection of the first electrode in the vertical projection direction.

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Hsinchu, Taiwan

Chih-Hou Tsai