Au Optronics Corporation

Chih-Fu Yang

Sung-Yu Su

Chun-Fan Chung

Rong-Fu Lin

Jie-Chuan Huang

Chi T Yu

Jhih-Syuan Fu

Wei-Jyun Chen

A multiplexer circuit includes a first switch unit and a second switch unit. The first switch unit is electrically connected to a first data line and a first pixel circuit, and configured to turn on according to a first signal in a first time duration. The second switch unit is electrically connected to the first data line and a second pixel circuit, and configured to turn on according to a second signal in a second time duration. The first time duration and the second time duration substantially start or end at a same time, so that the first time duration and the second time duration have overlap.

Display device and multiplexer circuit thereof

A data capture method and a data capture device are provided. The data capture method includes: receiving a data signal and a clock signal corresponding to the data signal; generating an auxiliary clock signal according to the clock signal, wherein phases of the clock signal and the auxiliary clock signal are different; sampling the data signal respectively according to the clock signal and the auxiliary clock signal to respectively obtain a plurality of data states and a plurality of edge sampling results; generating a plurality of pieces of edge information according to the data states and the corresponding edge sampling results, and performing an accumulation operation according to the edge information to generate a temporary value; and adjusting the clock signal according to the temporary value to generate an adjusted clock signal, and sampling the data signal according to the adjusted clock signal to obtain a plurality of transmission data.

Method and device of data capture

A data receiver includes a serial-data processing module, a null-frequency detecting unit, a data checking unit, a status control unit and a timeout checking unit. The serial-data processing module receives serial data, generates an operation clock, parallel data and required data, and determines whether the operation clock is correct for accordingly generating a first result. The null-frequency detecting unit receives the operation clock and determines whether the operation clock is locked or null for accordingly generating a second result. The data checking unit is enabled according to the first result and determines whether checking data of the required data is correct for accordingly generating a third result. The status control unit outputs a frequency-locked signal and changes the signal state of the frequency-locked signal according to the first to third results. The enabled timeout checking unit resets the serial-data processing module according to the signal state of the frequency-locked signal.

Data receiver and data receiving method thereof

Growing community of inventors

Hsin-Chu, Taiwan

Chih-Fu Yang