Realtek Semiconductor Inc.

Raymx Microelectronics Corp.

Yuan Ze University

Industrial Technology Research Institute

Chih-Ching Chien

Cheng-Yu Chen

Yen-Chung Chen

An-Ming Lee

Wei-Ren Hsu

Li-Cong Hou

Li-Chun Huang

Ying-Hui Zhu

Fu-Hsin Chen

Tsai-Te Lin

Chien-Hau Wu

Shih-Hsu Kang

Shih-Chen Tang

Han-Ting Tsai

Yu-Tze Horng

Zhen-Guo Sun

Yi-Ming Sun

Po-Chi Soo

Chang-Chieh Chen

Chun-Min Chang

Zhong Jin

Shan-Yu Chen

Hsiu-Hsiung Li

Li-Chun Pan

Yu-Hong Wei

Ho-Lin Wang

Wen-Ming Chen

The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal.

Flash memory control device capable of detecting type of interface and method thereof

A memory device includes a memory module and a control module. The control module is coupled to the memory module and is configured to store data into the memory module according to a first mapping table. The control module includes a storing unit and a guaranteeing unit. The storing unit is configured to store the first mapping table. The guaranteeing unit is coupled to the storing unit and is configured to determine whether the first mapping table is correct or not. The guaranteeing unit is further configured to issue an error signal in a state where the first mapping table is incorrect.

Memory device for guaranteeing a mapping table and method thereof

The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; an input/output (I/O) circuit operable to generate at least one terminal output signal according to signal variation of at least one terminal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal and/or the at least one terminal output signal.

Solid state drive control device and method

An apparatus and a method for accessing a plurality of memory blocks is disclosed. The An apparatus comprises: a memory circuit configured to store a recording table, wherein the recording table corresponds to quality index of the plurality of memory blocks; and a control circuit configured to group the plurality of memory blocks to a first memory group and a second memory group according to the quality index; to enable to access the memory blocks in the first memory group, and to disable to access the memory blocks in the second memory group.

Data storage device and operation method of the same

The present invention discloses a memory control device and method compatible to multiple types of interface the memory control device comprises: a multi-interface physical layer circuit configured to couple to a host, to receive a differential signal from the host, to detect at least one of characteristics of the differential signal to generate a physical layer output signal and to generate a physical layer output signal according to a detected result, wherein a frequency of the differential signal is higher than hundreds of KHz; and a processing circuit, coupled between the multi-interface physical layer circuit and a memory module, configured to receive the physical layer output signal from the multi-interface physical layer circuit, to determine the differential signal complies with one of a specification of an first type of interface and that of a second type of interface according to the physical layer output signal, and to adapt an operation mode of the memory control device to one of the multiple types of interface according to a determined result; wherein the memory control device operates in the adapted operation mode to receive at least one access command from the host to access the memory module.

Apparatus for adapting interface type of peripheral device and method thereof

A computing system including a memory, a processor and a solid state disk is provided. The memory stores a disk access driver program. The solid state disk includes a storage circuit and a control circuit. The control circuit includes a processing unit, a first access path and a second access path. The processing unit communicates with the processor through the first access path. The processor executes the driver program that enables the processor to process a disk access command for directly accessing the storage circuit of the solid state disk through the second access path.

System and method for accessing a storage device

Memory device and method for guaranteeing a mapping table

The present disclosure provides a weighting-type data relocation control device for controlling data relocation of a non-volatile memory which includes used blocks and unused blocks. Each used block is associated with a first parameter and a second parameter. The control device executes the following steps: multiplying the first and second parameters by a first and a second weightings respectively to obtain a priority index, in which at least one of the parameters and/or at least one of the weightings relate(s) to a thermal detection result; comparing the priority index with at least a threshold to obtain a comparison result; and if the comparison result corresponding to a used storage block of the used blocks reaches a predetermined threshold, transferring valid data of the used storage block to one of the unused blocks.

Weighting-type data relocation control device and method

System and method for direct disk accessing

The present invention discloses a memory card access device, the control method thereof and a memory card access system. Said device comprises: a memory card interface circuit to generate card-read data according to a card-read signal or generate a card-writing signal according to card-writing data; a host interface circuit to generate host-read data according to a host-read signal or generate the host-writing signal according to host-writing data; and a control circuit, coupled to the memory card and host interface circuits respectively, operable to generate the host-writing data by processing the card-read data according to a predetermined cache protocol or generating the card-writing data by processing the host-read data according to the predetermined cache protocol, so as to treat a memory card as a cache device.

Memory card access device, control method thereof, and memory card access system

A dual-interface card reader module is disclosed including: a card accessing circuit; a power controller for providing a charging current to a USB device; an overcurrent detector coupled with the power controller for generating an overcurrent notice when the charging current is greater than a current threshold; and a control circuit coupled with the card accessing circuit and the power controller for accessing a data storage card via the card accessing circuit and instructing the power controller to reduce its electricity output to lower the charging current when receiving the overcurrent notice.

Dual-interface card reader module

The invention discloses a method for production of polyhydroxybutyrate-co-polyhydroxyvalerate (PHBV) by recombinantharboring plasmid containing both phaCAB and prpE. Different percentage of hydroxyvalerate can be obtained from the recombinantwhen cultivated in the medium containing different concentrations of propionic acid. In this patent, we provide a method that integrated all of the genes (i.e. phaCAB, vgb and prpE) required for PHBV production into a single plasmid. The plasmids were then transformed into anhost. Results showed that PHBV can be produced by this recombinant, and the ration of HV to HB in the co-polymers can be regulated by addition of different concentrations of propionic acid in the medium. The percentage of HV in the co-polymers can be adjusted from about 3% up to more than 35%.

[object Object]

An integrated transmission circuit and method for transmitting output data to a chipset via a transmission interface are provided. The integrated transmission circuit includes a first application circuit, a second application circuit, a media access control (MAC) circuit, and a physical layer (PHY) circuit. The first application circuit is used for receiving and processing first data to output first processed data. The second application circuit is used for receiving and processing second data to output second processed data. The MAC circuit is coupled to the first application circuit and the second application circuit, and used for encoding the first processed data and the second processed data so as to output encoded data. The PHY circuit is coupled to the MAC circuit to receive the encoded data so as to output the output data to the transmission interface.

Integrated transmission circuit and method using a media access control circuit that collectively encodes data from two distinct application circuits

The present invention relates to a method of producing polyhydroxyalkanoates (PHAs) usingsp. with succinate as a carbon source. The PHAs comprise more than 95% of poly(3-hydroxyvalerate-co-4-hydroxyvalerate) (P3HV-co-P4HV).

Growing community of inventors

Hsinchu County, Taiwan

Chih-Ching Chien