Globalfoundries Inc.

Globalfoundries U.S. Inc.

Chih-Chiang Chang

Haigou Huang

Huy Cao

Pei Liu

Haiting Wang

Jinping Liu

Jiehui Shu

Daniel J Jaeger

Mitchell Rutkowski

Michael Vincent Aquilino

Suraj Kumar Patil

Jinsheng Gao

Katsunori Onishi

Patrick D Carpenter

Junsic Hong

Asli Sirman

Ruilong Xie

Hui Zang

Vimal Kumar Kamineni

Scott Beasor

Guowei Xu

Haifeng Sheng

Ashish Kumar Jha

Dinesh R Koli

Neal A Makela

Tai Fong Chao

Rongtao Lu

Xingzhao Shi

Yuan Zhou

Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

Multi-step insulator formation in trenches to avoid seams in insulators

The present disclosure relates to semiconductor structures and, more particularly, to a cap structure and methods of manufacture. The structure includes: a gate structure composed of conductive gate material; sidewall spacers on the gate structure, extending above the conductive gate material; and a capping material on the conductive gate material and extending over the sidewall spacers on the gate structure.

Cap structure

The present disclosure relates to methods for forming fill materials in trenches having different widths and related structures. A method may include: forming a first fill material in a first and second trench where the second trench has a greater width than the first trench; removing a portion of the first fill material from each trench and forming a second fill material over the first fill material; removing a portion of the first and second fill material within the second trench; and forming a third fill material in the second trench. The structure may include a first fill material in trenches having different widths wherein the upper surfaces of the first fill material in each trench are substantially co-planar. The structure may also include a second fill material on the first fill material in each trench, the second fill material having a substantially equal thickness in each trench.

Method of forming semiconductor material in trenches having different widths, and related structures

The present disclosure relates to semiconductor structures and, more particularly, to chamfered replacement gate structures and methods of manufacture. The structure includes: a recessed gate dielectric material in a trench structure; a plurality of recessed workfunction materials within the trench structure on the recessed gate dielectric material; a plurality of additional workfunction materials within the trench structure and located above the recessed gate dielectric material and the plurality of recessed workfunction materials; a gate metal within the trench structure and over the plurality of additional workfunction materials, the gate metal and the plurality of additional workfunction materials having a planar surface below a top surface of the trench structure; and a capping material over the gate metal and the plurality of additional workfunction materials.

Chamfered replacement gate structures

A method of controlling NFET and PFET gate heights across different gate widths with chamfering and the resulting device are provided. Embodiments include forming an ILD over a fin; forming cavities in the ILD, each with similar or different widths; forming a high-K dielectric layer over the ILD and in each cavity; forming a pWF metal layer over the dielectric layer in one cavity; recessing the pWF metal layer to a height above the fin; forming an nWF metal layer in the cavities over the dielectric and pWF metal layers; recessing the nWF metal layer to a height above the pWF metal layer; forming a barrier layer over the dielectric and nWF metal layers; filling the cavities with a low-resistive metal; and recessing the barrier and dielectric layers to a height above the nWF metal layer; and concurrently etching the low-resistive metal.

Integration scheme for gate height control and void free RMG fill

Methods of forming a SAC cap with SiN U-shaped and oxide T-shaped structures and the resulting devices are provided. Embodiments include forming a substrate with a trench and a plurality of gate structures; forming a nitride liner over portions of the substrate and along sidewalls of each gate structure; forming an ILD between each gate structure and in the trench; recessing each gate structure between the ILD; forming a U-shaped nitride liner over each recessed gate structure; forming an a-Si layer over the nitride liner and the U-shaped nitride liner; removing portions of the nitride liner, the U-shaped nitride liner and the a-Si layer; forming a W layer over portions of the substrate adjacent to and between the a-Si layer; forming an oxide liner over the nitride liner, the U-shaped nitride liner and along sidewalls of the W layer; and forming an oxide layer over portions of the oxide liner.

Advanced structure for self-aligned contact and method for producing the same

A structure and method for forming a tungsten region for a replacement metal gate (RMG). The method for forming the tungsten region may include, among other things, forming a first tungsten region i.e., tungsten seed layer, on a liner in a trench of a dielectric layer; removing a portion of the liner and the tungsten seed layer to expose an uppermost surface of a work function metal (WFM) layer wherein an uppermost surface of the liner and tungsten seed layer is positioned below an uppermost surface of the dielectric layer; and forming a second tungsten region from the tungsten seed layer. The tungsten region may be formed to contact the uppermost surface liner, the uppermost surface of WFM layer, and/or the sidewalls of the trench. The tungsten region may include a single crystallographic orientation. The tungsten region may also include an uppermost surface with a substantially arcuate cross-sectional geometry.

Tungsten gate and method for forming

Methods of forming a sacrificial gate cap and a self-aligned contact for a device structure. A gate electrode is arranged between a first sidewall spacer and a second sidewall spacer. A top surface of the gate electrode is recessed to open a space above the top surface of the recessed gate electrode that partially exposes the first and second sidewall spacers. Respective sections of the first and second sidewall spacers, which are arranged above the top surface of the recessed gate electrode, are removed in order to increase a width of the space. A sacrificial cap is formed in the widened space.

Enlarged sacrificial gate caps for forming self-aligned contacts

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Clifton Park, NY, United States of America

Chih-Chiang Chang