Qualcomm Incorporated

Nvidia Corporation

Chih-Chi Cheng

Wesley James Holland

Huang Huang

Songhe Cai

Ling Feng Huang

Bohuslav Rychlik

Stephen William Keckler

Rashmi Kulkarni

Simon Peter William Booth

Yun-Ta Tsai

Iuri Frosio

Rajakumar Govindaram

Daniel Robert Johnson

Jeffrey Shabel

Ramesh Ramaswamy

Satish Anand

Satish Goverdhan

Jason Lavar Clemons

Venkata Rajesh Kumar Sastrula

In some aspects, the present disclosure provides a method for managing a command queue in a universal flash storage (UFS) host device. The method includes determining to power on a first subsystem of a system-on-a-chip (SoC), wherein the determination to power on the first subsystem is made by a second subsystem of the SoC based on detection of user identity data contained in a first image frame during an initial biometric detection process. In certain aspects, the second subsystem is configured to operate independent of the first subsystem and control power to the first subsystem. In certain aspects, the second subsystem includes a second optical sensor, a set of ambient sensors, and a second processor configured to detect, via a set of ambient sensors, an event comprising one or more of an environmental event outside of the device or a motion event of the device.

Multi-stage biometric authentication

In some aspects, the present disclosure provides a method for sharing a single optical sensor between multiple image processors. In some embodiments, the method includes receiving, at a control arbiter, a first desired configuration of a first one or more desired configurations for capturing an image frame by the optical sensor, the first one or more desired configurations communicated from a primary image processor. The method may also include receiving, at the control arbiter, a second desired configuration of a second one or more desired configurations for capturing the image frame by the optical sensor, the second one or more desired configurations communicated from a secondary image processor. The method may also include determining, by the control arbiter, an actual configuration for capturing the image frame by the optical sensor, the actual configuration based on the first desired configuration and the second desired configuration.

Sharing an optical sensor between multiple optical processors

A patch memory system for accessing patches from a memory is disclosed. A patch is an abstraction that refers to a contiguous, array of data that is a subset of an N-dimensional array of data. The patch memory system includes a tile cache, and is configured to fetch data associated with a patch by determining one or more tiles associated with an N-dimensional array of data corresponding to the patch, and loading data for the one or more tiles from the memory into the tile cache. The N-dimensional array of data may be a two-dimensional (2D) digital image comprising a plurality of pixels. A patch of the 2D digital image may refer to a 2D subset of the image.

Patch memory system

Growing community of inventors

Santa Clara, CA, United States of America

Chih-Chi Cheng