Taiwan Semiconductor Manufacturing Comp. Ltd.

Chih-Cheng Chin

Shih-Ming Chang

Wen-Chuan Wang

Sheng-Chi Chin

Chi-Lun Lu

Chin-Hsiang Lin

Chung-Hsing Chang

Jeng-Horng Chen

Burn Jeng Lin

Chien-Hung Lin

Hung-Chang Hsieh

Chia-Hui Lin

Fu-Jye Liang

Hung Chang Hsieh

Bang-Ching Ho

A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.

Holographic reticle and patterning method

Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.

Method and apparatus for compensated illumination for advanced lithography

A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.

System and method for examining mask pattern fidelity

A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main pattern feature and is configured to have a dimension less than an etching bias of an etching process. The etching process is capable of transferring the main pattern feature to an underlying layer, such that the sacrificial pattern feature adjusts an etching behavior of the main pattern feature and is eliminated from the underlying layer.

Etching bias reduction

A method for repairing a defective photomask having contained therein a minimum of one defect within a defective pattern employs a non-defective photomask for purposes of photoexposing a photoresist layer formed upon the defective photomask such as to form a patterned photoresist layer which leaves exposed the minimum of one defect. The minimum of one defect may then be repaired with the patterned photoresist layer in place as a repair mask. The method also provides for use of a non-defective pattern region within a defective photomask in a like fashion for repairing a defective pattern region within the same photomask. The method may be extended to repairing defective microelectronic products.

Defect repair method employing non-defective pattern overlay and photoexposure

A method for transferring a pattern from a mask to a substrate (or wafer), comprises dividing a mask generation data file into a plurality of segments. The segments include a main pattern area and a stitching area. Each stitching area contains a respective common pattern. An image of an illuminated portion of the main pattern area is formed. Connection ends of the segments in a substrate area (or wafer area) are illuminated with an illumination beam. An image of the illuminated portion of the main pattern area is formed, and a halftone gray level dosage distribution is produced in the substrate area (or wafer area) corresponding to the common pattern. The common patterns of adjacent segments substantially overlap in the substrate area (or wafer area).

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Taipei, Taiwan

Chih-Cheng Chin