Taiwan Semiconductor Manufacturing Comp. Ltd.

Chien-Yu Li

Chen-Hua Douglas Yu

Hsien-Wei Chen

Chung-Shi Liu

Shin-Puu Jeng

Hung-Jui Kuo

Der-Chyang Yeh

Li-Hsien Huang

Chun-Kuang Chen

Chi-Cheng Hung

Wei-Liang Lin

Jhih-Yu Wang

Iu-Ren Chen

Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes an integrated circuit die, an encapsulant at least laterally encapsulating the integrated circuit die, a redistribution structure on the integrated circuit die and the encapsulant, a connector support metallization coupled to the redistribution structure, and an external connector on the connector support metallization. The redistribution structure includes a dielectric layer disposed distally from the encapsulant and the integrated circuit die. The connector support metallization has a first portion on a surface of the dielectric layer and has a second portion extending in an opening through the dielectric layer. The first portion of the connector support metallization has a sloped sidewall extending in a direction away from the surface of the dielectric layer.

Package with UBM and methods of forming

A method for lithography exposing process is provided. The method includes performing a first lithography exposing process to a resist layer using a mask having a focus-sensitive pattern and an energy-sensitive pattern; measuring critical dimensions (CDs) of transferred focus-sensitive pattern and transferred energy-sensitive pattern on the resist layer; extracting Bossung curves from the CDs; and determining slopes of the Bossung curves.

Method and structure for lithography processes with focus monitoring and control

Growing community of inventors

Hsinchu, Taiwan

Chien-Yu Li