System General Corporation

Semiconductor Components Industries, LLC

Chien-Tsun Hsu

Ta-Yung Yang

Cheng-Sung Chen

Hang-Seok Choi

Chih-Hsien Hsieh

Shao-Chun Huang

Ting-Ta Chiang

Li Kuei Lin

Wei-Hsuan Huang

Youngbae Park

Jian-Ming Fu

Ying-Chi Chen

A method for frequency reduction of a quasi-resonant (QR) converter includes detecting a valley point of a resonant waveform of the QR converter, by detecting a voltage level of the resonant waveform falling below a first threshold voltage. A blanking time is formed from the beginning of a QR conversion cycle to the valley point. The blanking time is extended in response to a first reduction of an output loading of the QR converter, while maintaining a primary current of the QR converter at a first current level. The primary current is reduced to a second current level being less than the first current level, while maintaining the blanking time at a maximum blanking time, in response to a second reduction of the output loading.

Advanced frequency reduction of quasi-resonant converters

An exemplary embodiment of an alternating valley switching controller is provided. The alternating valley switching controller includes a valley detection circuit and an alternating circuit. The valley detection circuit is coupled to an auxiliary winding of a transformer to generate a valley-detection signal. The alternating circuit alternates a plurality of switching periods of a switching signal according to a blanking-window signal and the valley-detection signal. The blanking-window signal switches between a first voltage level and a second voltage level in the plurality of switching periods. The plurality of switching periods includes at least two first periods and at least two second periods which occur alternately in response to the first voltage level and the second voltage of the blanking-window signal.

Alternating valley switching for power converter

A control circuit of a power converter is provided. The control circuit comprises a PWM circuit, a sample circuit, and emulation circuit. The PWM circuit generates a switching signal for switching an inductor and generating a switching current of the inductor in response to a current feedback signal. The sample circuit is coupled to sample a switching current signal into a capacitor during an on time of the switching signal. The emulation circuit generates a discharge current couple to discharge the capacitor during an off time of the switching signal for generating the current feedback signal. The switching current signal is correlated to the switching current of the inductor, and the discharge current is generated in response to an input voltage of the inductor, an output voltage of the power converter, and the on time of the switching signal.

Switching current synthesis circuit for power converter

A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal and an oscillation signal. A waveform generator generates a waveform signal in response to the oscillation signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a switching signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to a second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.

Method and apparatus of providing a biased current limit for limiting maximum output power of power converters

A switching controller for a PFC converter is provided. The switching controller comprises a switching-control circuit, a current-command circuit, a programmable feedback circuit, a modulator, an over-voltage detection circuit, and a light-load detection circuit. The switching controller is capable of regulating a bulk voltage of the PFC converter at different levels in response to load conditions of the PFC converter. A turbo current eliminates a first voltage undershooting of the bulk voltage at the transient that the bulk voltage decreases to arrive at a second level from a first level. A voltage-loop error signal is maximized to eliminate a second voltage undershooting of the bulk voltage at the transient that the bulk voltage starts to increase toward the first level from the second level.

PFC converter having two-level output voltage without voltage undershooting

A switching controller for a boost power converter includes a switching-control circuit and a programmable feedback circuit. The programmable feedback circuit is coupled to an output of the boost power converter via a voltage divider. The programmable feedback circuit includes a current source coupled to a switch. On a light-load condition, a power-saving signal turns on the switch. The switch will conduct a programming current supplied by the current source toward the voltage divider. Furthermore, the voltage divider is externally adjustable for programming a determined level of an output voltage of the boost power converter on the light-load condition. Additionally the present invention increases system design flexibility to meet practical power-saving requirements without adding circuitries and increasing cost.

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Taipei, Taiwan

Chien-Tsun Hsu