Raydium Semiconductor Corporation

Minmax Technology Co., Ltd.

Chien-Ming Chen

Ko-Yang Tso

Hui-Wen Miao

Yann-Hsiung Liang

Chih-Chuan Huang

Yu-Lung Lo

Cheng-Chou Wu

Kuan-Hung Chou

A wide input voltage range power converter circuit in a one-stage-two-switch configuration has a power input terminal, a switch node connected to the power input terminal, a transformer, two electronic switches, a pulse width modulation (PWM) circuit, and an output circuit. An input side of the transformer has a first winding and a second winding that are connected to the switch node. An output side of the transformer has an output winding. A turns ratio between the first winding and the output winding is different from a turns ratio between the second winding and the output winding. The two electronic switches are respectively connected to the first winding and the second winding in series. The PWM circuit is connected to the power input terminal and control terminals of the two electronic switches. The output circuit is connected to the output winding.

Wide input voltage range power converter circuit in a one-stage- two-switch configuration

A driving circuit for connecting a display module is provided. The driving circuit includes a polarity control module, an output control module, and a detecting module. The polarity control module provides a polarity control signal. The output control module is connected with the polarity control module and provides a plurality of output control signals. The detecting module is coupled with the polarity control module and the output control module, wherein the detecting module detects the polarity control signal and selectively controls the output control module to operate in at least one of a first control mode and a second control mode to control the output control signals.

Driving circuit

A driving circuit includes channels, a positive converting unit, a negative converting unit, an input switch, and an operational amplifier. A first digital data and a second digital data are alternatively transmitted in a first channel and a second channel. The positive converting unit and negative converting unit are respectively disposed in first channel and second channel and convert first digital data and second digital data into a positive analog data and a negative analog data. A first input terminal and a second input terminal of operational amplifier are respectively in first channel and second channel. After input switch respectively transmits positive analog data and negative analog data to first input terminal and second input terminal or to second input terminal and first input terminal, positive analog data and negative analog data are transmitted in a channel of the channels corresponding to entering operational amplifier.

Driving circuit and data transmitting method

An analog to digital converter generating a number of corresponding voltages in response to a number of values of a grey level is provided. The analog to digital converter includes a decoder and an operational amplifier. The decoder provides first to third output voltages having the same level when w most significant bits (MSBs) of the grey level correspond to the same value, provides first and second intermediate voltages in response to the x MSBs next to the w MSBs when the w MSBs correspond to different values, and selectively has the first to the third output voltages equal to one of the first and the second intermediate voltages. The operational amplifier obtains a pixel voltage by interpolating the first to the third output voltages, wherein the sum of w and x is smaller than or equal to the bit number of the gray level.

Analog to digital converter

An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a half analog supply voltage (HAVDD), or both operated between the half analog supply voltage (HAVDD) and a ground voltage. The comparator compares an input signal with an output signal and outputs a control signal to the bias current source according to the compared result.

Output buffer of source driver

An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a ground voltage (AGND). The comparator compares an input voltage and an output voltage and outputs a control signal to the bias current source according to the compared result to control a bias current outputted by the bias current source to enhance the slew rate of the output buffer.

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Tainan, Taiwan

Chien-Ming Chen