Realtek Semiconductor Inc.

Chien-Hsun Lu

Chun-Chieh Chan

Ming-An Wu

Chia-Hao Chang

Che-Wei Yeh

Tzuo-Bo Lin

Tai-Jung Wu

Chih-Yuan Yang

Shin-Yu Lin

Zhan-Yao Gu

Ying-Ying Song

Yi-Han Peng

The present disclosure discloses a video interface conversion device that includes a first and a second interface transmission circuit, a color conversion circuit and an image compression circuit. The first and the second interface transmission circuit are respectively electrically coupled to an image source and a display terminal. The second interface transmission circuit negotiates a maximum output bandwidth with the display terminal such that the first interface transmission circuit compares an input data bandwidth of a data signal received from the image source and the maximum output bandwidth. When the maximum output bandwidth is smaller than the input data bandwidth, an image compression and/or a color coding conversion is performed on the data signal, and the data signal having the processed input data bandwidth being smaller than or equal to the maximum output bandwidth is further transmitted by the second interface transmission circuit to the display terminal.

Video interface conversion device and method

A data conversion device includes a storage circuit and a frequency tuning circuit. The storage circuit is configured to store a pixel data in a high definition multimedia interface (HDMI) signal according to a first clock, and output an image data according to a second clock. The frequency tuning circuit is configured to adjust the second clock according to a control signal and the second clock in the HDMI signal, and transmit the adjusted second clock to the storage circuit.

Data conversion and high definition multimedia interface receiving device

A detection circuit and a wake-up method are provided. The detection circuit is adapted to a high definition multimedia interface (HDMI) receiver that enters a power-saving mode in a fixed rate link (FRL) mode to detect whether or not an HDMI transmitter starts to transmit video packets through the FRL. The detection circuit includes a signal detection circuit detecting whether or not signal exists on the FRL and an FRL packet determination circuit determining whether or not the FRL packets are the video packets according to a variable value characteristic of the video packets and/or a fixed value characteristic of gap packets. An existence of the signal on the FRL indicates an existence of FRL packets on the FRL. When the FRL packets are the video packets, the FRL packet determination circuit wakes the HDMI receiver from the power-saving mode to resolve the video packets and display videos.

Detection circuit and wake-up method

A data packing circuit and a data packing method operated in a high definition multimedia interface (HDMI) transmitter that adopts a fixed rate link mode are provided. The data packing circuit can output a plurality of FRL super blocks at a plurality of unit times. In the data packing method, multiple valid data inputted to the data packing circuit at the (i)unit time are mapped to a plurality of FRL characters, and the FRL characters are stored to the first or the second buffer. At the same time, an amount of tri-byte of the multiple valid data is counted for determining number and positions for inserting gap characters to form the (i)FRL super block, which is outputted at the (i+1)unit time. The numeral 'i' is a positive integer.

Data packing circuit and data packing method

A signal relaying circuit includes an input interface arranged for receiving an input signal; a DisplayPort (DP) output interface arranged for outputting a DP-like signal, where the input interface and the DP output interface correspond to different interface standards; and a relaying circuit coupled between the input interface and the DP output interface, arranged for relaying the input signal to the DP output interface according to the characteristics of channels, so as to generate the DP-like signal. A signal receiving circuit, signal relaying method and signal receiving method are also disclosed.

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Hsinchu, Taiwan

Chien-Hsun Lu