Taiwan Semiconductor Manufacturing Comp. Ltd.

Chien-hao Chen

Huicheng Chang

Ziwei Fang

Chih-Wei Chang

Su-Hao Liu

Yan-Ming Tsai

Chung-Ting Wei

A semiconductor structure includes a first multi-gate transistor and a second multi-gate transistor. The first multi-gate transistor includes a first Al-containing high-k dielectric layer having a first Al concentration, and a W-and-N-containing barrier layer. The second multi-gate transistor includes a second Al-containing high-k dielectric layer having a second Al concentration. The first Al concentration is less than the second Al concentration.

Semiconductor structure

The present disclosure provides a method that includes providing a semiconductor substrate having a first region and a second region; forming a first gate within the first region and a second gate within the second region on the semiconductor substrate; forming first source/drain features of a first semiconductor material with an n-type dopant in the semiconductor substrate within the first region; forming second source/drain features of a second semiconductor material with a p-type dopant in the semiconductor substrate within the second region. The second semiconductor material is different from the first semiconductor material in composition. The method further includes forming first silicide features to the first source/drain features and second silicide features to the second source/drain features; and performing an ion implantation process of a species to both the first and second regions, thereby introducing the species to first silicide features and the second source/drain features.

Field effect transistor contact with reduced contact resistance

A method for forming a semiconductor structure includes forming a first FET device and a second FET device over a substrate. Forming a first gate trench in the first FET device and a second gate trench in the second FET device. Forming a first high-k gate dielectric layer in the first gate trench, and a second high-k gate dielectric layer in the second gate trench. Forming a first barrier layer over the first high-k gate dielectric layer, and a second barrier layer over the second high-k gate dielectric layer. Increasing N nitridations in the first and second barrier layers. Removing the second barrier layer to expose the second high-k gate dielectric layer. Forming a first work function metal layer over the first barrier layer and a second work function metal layer over the second high-k gate dielectric layer.

Growing community of inventors

YILAN COUNTY, Taiwan

Chien-hao Chen