Chunghwa Picture Tubes, Ltd.

Intellectual Ventures Fund 83 LLC

Nytell Software LLC

Chien-Chih Jen

Ming-Zen Wu

Yuan-Hao Chang

Wen-Hsiung Liu

Chien-Kuo He

Fu-Yuan Shiau

Chun-Hung Tung

A driving circuit of a liquid crystal display panel includes a substrate, a plurality of driver IC chips located on the substrate, a current supplier, and a first conductive wire set. The first conductive wire set has a plurality of conductive wire segments for connecting the driver IC chips in parallel to the current supplier. Furthermore, the conductive wire segments each have a form, such that paths formed of the conductive wire segments from the current supplier to the respective driver IC chips have an equal resistance, and, accordingly, each of the driver IC chips obtain the same input voltage. Hence, a problem of band mura is avoided.

Driving circuit of a liquid crystal display panel

A pixel structure, suitable being driven by a scan line and a data line on a substrate, is provided. The pixel structure includes a thin film transistor (TFT) and a pixel electrode. Wherein, the TFT includes a gate, a first and a second dielectric layer, a semiconductor layer, a source, and a drain. Especially, the semiconductor layer has a body part and at least one extending part connected to thereof. The extending part is protruded from the edge of the body part disposed between the source and the drain. In addition, at least one contact hole is disposed in the second dielectric layer for exposing the extending part, and the first dielectric layer, the semiconductor layer, and the second dielectric layer at the extending part are removed through the contact hole. So, leakage current can be effectively reduced, thereby raising the Ion/Ioff ratio of the pixel structure.

Pixel structure, thin film transistor array substrate and liquid crystal display panel

An active device array substrate is provided. The active device array substrate comprises a substrate, multiple first lines, second lines, active devices, pixel electrodes and common lines. The first lines and second lines are disposed on the substrate and they form multiple pixel regions on the substrate. The active devices are respectively disposed in the pixel regions and each of the active devices is electrically connected to a first line and a second line, respectively. The pixel electrodes are respectively disposed in the pixel regions and each of the pixel electrodes is electrically connected to an active device, respectively. The common lines and first lines are roughly parallel and they are staggeringly disposed on the substrate. Each of the common lines has multiple branches which extend outside from their edges of two sides, and each of these branches is partly overlapped with the second lines.

Active device array substrate

A pixel structure and a method of repairing the same are provided. The pixel structure includes a scan line, a data line, a thin film transistor, a pixel electrode, a common line and a dielectric layer. The common line adjacent to the data line serves as a repairing section, the repairing section includes a first repairing terminal, a second repairing terminal and a cutting region, the first repairing terminal and the second repairing terminal are disposed under the data line and the cutting region is disposed between the first repairing terminal and the section of the common line that does not extend along the data line, and the pixel electrode does not cover the cutting region.

Pixel structure and method of repairing the same

An array of active devices and a method for testing an array of active devices are provided. The array comprises a substrate, a plurality of scan lines, a plurality of data lines, a plurality of pixel units and a plurality of test pads. The substrate comprises a display area and a peripheral area. The scan lines and the data lines are positioned on the substrate, and enclose a plurality of pixel areas and dummy pixel areas in the display area and the peripheral area, respectively. The pixel units are positioned in the pixel areas and are connected to the scan lines and the data lines, respectively. Finally, The test pads are positioned close to the scan lines and/or the data lines, and positioned on the substrate and in the peripheral area. Each of the test pads is connected to the corresponding data line or the corresponding scan line.

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Taipei, Taiwan

Chien-Chih Jen