Novatek Microelectronics Corp.

Industrial Technology Research Institute

Chien-Cheng Tu

Chung-Wen Wu

Sih-Ting Wang

Chia-Chun Liu

Chien-Chung Chen

Po-Ju Lee

Nang-Ping Tu

Chiao-Wei Hsiao

Wen-Hsuan Lin

Yung-Yuan Ho

Shyr-Chyau Luo

Ching-Ching Chi

Jian-Yau Yih

Shaw-Jia Hor

Cheng-Wei Chen

Jung-Dar Ho

A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.

Short detection circuit, light-emitting diode chip, light-emitting diode device and short detection method

An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.

Integrated backlight driving chip and LED backlight device

A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.

Light-emitting diode driving device, light-emitting diode device, and method for driving the same

An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series. The integrated circuit has a driving circuit coupled to the LED strings. The driving circuit supplies a driving voltage to first ends of the LED strings to drive the LED strings. The driving circuit is also configured to maintain a voltage value of the driving voltage obtained while all of the strings of the light emitting diodes are turned on, until all of the LED strings are turned on again. Accordingly, the interference of the LED strings is decreased, and the LED strings operate more stably.

Image processing circuit and light illumination module

In a normal mode, the power supply is fed back in a close loop, but in a power saving mode, the power supply is fed back in an open loop. When it is detected that the power supply is continuously fed back in the open loop and in a substantially zero output status, the power supply circuit enters a power down status. If the back-stage circuit needs power supply again, then the feedback is switched to the close loop and the power supply circuit enters the normal mode.

Power supply circuit and method thereof

A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.

Dual-port input equalizer

A differential-signal output circuit for a timing controller of a display device includes a conversion circuit, a pre-charging circuit and a timing generator. The conversion circuit is used for receiving a differential signal and outputting a current to a load circuit according to polarity of the differential signal. The pre-charging circuit is coupled to a first output end and a second output end of the conversion circuit or is coupled to a first power driving end and a power second driving end of the conversion circuit. The pre-charging circuit is used for pre-charging the load according to a control signal. The timing generator is used for generating the differential signal and a control signal according to display data.

Differential signal output circuit for timing controller of display device

A low power differential signaling transmitter includes a switchable current source apparatus and a differential signaling generator coupled to the switchable current source apparatus. The switchable current source apparatus receives a first input voltage and a second input voltage, and generates a plurality of reference currents according to the first input voltage and the second input voltage. The differential signaling generator includes a plurality of first transistors, a plurality of second transistors, a first output voltage terminal and a second output voltage terminal. The on or off states of the first transistors and the second transistors are controlled by the reference currents. The first output voltage terminal outputs a first output voltage, and the second output voltage terminal outputs a second output voltage. The first output voltage and the second output voltage are determined according to the on or off states of the first and second transistors.

Low power differential signaling transmitter

A low voltage differential signaling (LVDS) transmitter receives a data signal, a data invert signal and a plurality of logic signals. The LVDS transmitter includes a first-stage differential signaling transmitting circuit and a second-stage differential signaling transmitting circuit. The first-stage differential signaling transmitting circuit receives the data signal and the data invert signal and has a first output terminal and a second output terminal. The second-stage differential signaling transmitting circuit is controlled by the logic signals, and has a third output terminal and a fourth output terminal respectively connected to the first output terminal and the second output terminal, so as to generate a needed pre-emphasis signal. When no pre-emphasis signal needs to be generated, the second-stage differential signaling transmitting circuit is controlled to be in disabled state.

Low voltage differential signaling transmitter and transmitting method

An apparatus for expressing circuit version identification (VID) includes multiple conductive layers, a circuit VID unit, and a first and a second pull-up or pull-down circuits. Each of the conductive layers includes a first and a second conductive line. The first pull-up or pull-down circuit is coupled to the first conductive line. An input terminal of the circuit VID unit is coupled to the second conductive line. An output terminal of the circuit VID unit outputs the circuit VID. The second pull-up or pull-down circuit is coupled to the input terminal of the circuit VID unit. When the circuit VID needs to be in a first state, the first conductive line and the second conductive line are disconnected from each other. On the other hand, when the circuit VID needs to be in a second state, the first conductive line and the second conductive line are coupled to each other.

Apparatus for expressing circuit version identification information

A current source apparatus with bias switches, applied in digital-to-analog converters, is disclosed. The current compliance and settling time performances can be promoted via improving the structure of the bias circuit and making the MOS transistors operate in the saturation region, without increasing the dimensions of the MOS transistors.

Current source apparatus with bias switches

The continuing need for faster and denser SRAM memories places a constant increased demand on the power consumption of the memory devices. Much of the power consumption occurs during the pre-charge phase where it is common practice to bring up all pre-charge circuits at once and hold them active until the memory operations are complete. This invention describes a design where each pre-charge circuit connected to a group of memory cells through bit lines is activated at a separate time from the other pre-charge circuits. Thus each pre-charge circuit is active only during the time that useful work is being done with that portion of the memory. This reduces power consumption by not powering on circuits and precharging bit lines before they are actually needed.

Growing community of inventors

Hsinchu, Taiwan

Chien-Cheng Tu