Via Technologies, Inc.

National Taiwan University

Chien-Cheng Chang

Ming-Hsun Hsu

Yu-En Tzeng

Chin-Chou Chu

Fan-Gang Tseng

Chien-Fu Chen

Cheng-Yuan Wu

Chien-Chung Chang

Po-Hsiang Tsui

Chun-Fei Kung

Jen-Jen Lin

An ultrasonic imaging technique for differentiating the distribution of scatterers within a tissue comprises a correcting and an imaging procedure. The correcting procedure includes steps of obtaining ultrasonic backscattered signals from a standard phantom, compensating and demodulating the signals into an envelope image, calculating the parameter m and, selecting a window to calculate parameter min each location of the envelope image and, if&#x2260;then increase the size of the window to repeat the steps above, and when=, it is the optimal size of the window. The imaging procedure includes steps of obtaining ultrasonic backscattered signals from a target tissue, compensating and demodulating the signals into an envelope image, calculating min each location to form a mmatrix, and presenting the matrix by utilizing pseudocolors.

Ultrasonic imaging technique for differentiating the distribution of scatterers within a tissue

A method for saving electrical power for a physical layer (PHY) device including a plurality of sub-circuits is disclosed. The method includes the steps of outputting a plurality of link pulses, asserting a plurality of disabling signals between two adjacent link pulses for disabling the sub-circuits, respectively, and deasserting the disabling signals for enabling the sub-circuits, respectively. The disabling signals are asserted separately for disabling the sub-circuits at different time points. A physical layer device for use in a chip for saving electrical power is also disclosed.

Physical layer device and power-saving method for physical layer device

Circuit and method for testing digital logic circuit modules of an integrated circuit chip. The circuit includes a storage device, a first multiplexing module and a selection device. The storage device stores first, second, third and fourth N-bit groups of a test pattern separately according to a loading signal and an address selection signal. The first multiplexing module is coupled to the storage device and a first digital logic circuit module, for parallel transmitting the first, second, third and fourth N-bit groups which will be received and executed by the first digital logic circuit module to parallel generate first, second and third M-bit groups. The selection device is coupled to the first digital logic circuit module for sequentially selecting one of the first, second and third M-bit groups to output a first test result according to the address selection signal.

Systems and methods for chip testing

A multi-port network interface circuit and related control method. The network interface circuit has a plurality of PHY circuits, each of the PHY circuit is used for transmitting signals to a plurality of corresponding network nodes via different ports. Each of the PHY circuits scrambles signals transmitted at different ports with different seeds, and the network interface circuit resets different PHY circuits at different times such that each of the PHY circuits starts to transmit signals at a different time.

Multi-port network interface circuit and related method for scrambling codes of different ports with different seeds and resetting signal transmission of different ports at different times

A multi-port network interface circuit and relative control method. The multi-port network is used for transmitting a plurality of signals to different nodes (like terminals) of a network via multiple ports of the network interface circuit. The network interface circuit triggers the transmission of the signals of the different ports with clocks of different phases, such that transition of the transmitted signals of different ports will not occur at a same time.

Multi-port network interface circuit and related method for triggering transmission signals of multiple ports with clocks of different phases

A liquid transportation device includes a working board, a working liquid, a liquid channel and a cover board, wherein the liquid channel is formed on a top surface of the working board, the covering board is fully covered the liquid channel, the liquid channel composed of a material substantially tending to the liquid, and the covering board is composed of a material substantially phobic to the liquid. The working liquid flows within the liquid channel in guidance of the deviation of surface tension between the liquid channel to the working liquid, and the covering board to the working liquid, so that the working liquid is transported within the liquid channel without any external power.

Growing community of inventors

Taipei, Taiwan

Chien-Cheng Chang