Taiwan Semiconductor Manufacturing Comp. Ltd.

Aver Information Inc.

Chien-Chang Lin

Hsin-Yu Pan

Jiun-Yi Wu

Yu-Min Liang

Chi-Yang Yu

Sen-Kuei Hsu

Jung-Wei Cheng

Lipu Kris Chuang

Yen-Fu Su

Kai-Chiang Wu

Chung-Hao Tsai

Ching-Feng Yang

Yi-Che Chiang

Ming-Te Cheng

Ming-Chang Lu

A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.

Semiconductor package

An image capturing assembly including a mounting base, a driving component, a first gear, a second gear, a lens assembly, a third gear and a resistance component. The driving component is disposed on the mounting base. The first gear is connected to the driving component and configured to be driven by the driving component. The second gear is pivotally connected to the mounting base and connected to the first gear. The driving component is configured to drive the second gear via the first gear. The lens assembly is fixed to the second gear. The third gear is pivotally connected to the mounting base and engaged with the second gear. The resistance component presses against the third gear to allow the third gear to transmit a resistance against the second gear during a rotation of the second gear.

Image capturing assembly

A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage.

A semiconductor package includes a circuit board structure, a redistribution layer structure, a package structure, and a ring structure. The redistribution layer structure has a first region and a second region surrounding the first region. The redistribution layer structure is disposed over and electrically connected to the circuit board structure. A metal density in the second region is greater than a metal density in the first region. The package structure is disposed over the first region of the redistribution layer structure. The package structure is electrically connected to the redistribution layer structure. The ring structure is disposed over the second region of the redistribution layer structure.

Semiconductor package and manufacturing method thereof

A memory module includes a first redistribution structure, a second redistribution structure, first semiconductor dies, second semiconductor dies, an encapsulant, through insulator vias and thermally conductive material. Second redistribution structure is stacked over first redistribution structure. First semiconductor dies are sandwiched between first redistribution structure and second redistribution structure and disposed side by side. Second semiconductor dies are disposed on the second redistribution structure. The encapsulant laterally wraps the second semiconductor dies. The through insulator vias are disposed among the first semiconductor dies, extending from the first redistribution structure to the second redistribution structure. The through insulator vias are electrically connected to the first redistribution structure and the second redistribution structure. The thermally conductive material is disposed on the second redistribution structure, among the second semiconductor dies and overlying the through insulator vias. The thermally conductive material has a thermal conductivity larger than that of the encapsulant.

Memory module, semiconductor package including the same, and manufacturing method thereof

Semiconductor packages are provided. One of the semiconductor packages includes a first sub-package and a second sub-package. The first sub-package includes a first die, a graphite oxide layer on the first die and an encapsulant encapsulating the first die and the graphite oxide layer. The second sub-package is stacked on and electrically connected to the first sub-package, and includes a second die. The graphite oxide layer is disposed between the first die and the second die.

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Taipei, Taiwan

Chien-Chang Lin