Hon Hai Precision Industry Co., Ltd.

Hong-fu Jin Precision Industry (shenzhen) Co., Ltd.

Chia-Nan Pai

Shou-Kuo Hsu

Ya-Ling Huang

Hua-Li Zhou

Shi-Piao Luo

Han-Long Chen

Ming Wei

Jia-Lu Ye

Chien-Hung Liu

Shen-Chun Li

Hsien-Chuan Liang

Yung-Chieh Chen

Cheng-Hsien Lee

Cheng-Shien Li

Wen-Laing Tseng

Ning Li

Ling-Ling Shen

Hsiao-Chuan Tu

Zheng Shan

Yan-Jun Li

A printed circuit board (PCB) includes a receiver component, a transmission line including a positive signal transmission line and a negative signal transmission line, a transmitter component, and a capacitance unit. The transmitter component transmits a different signal to the receiver component via the transmission line. The capacitance unit is spaced from the receiver component a predetermined distance S, therein, the predetermined distance S is calculated by a formula S=Vx (n*UI&#x2212;(CC)&#xd7;Zo/2)/2, and V is a speed of the transmission line. Cis an equivalent capacitance value of the receiver component, Cis a capacitance value of the capacitance unit, Zo is a resistance value of the transmission line, UI is a half of one cycle of the differential signal, and n is a value less than or equal to 1.5 and greater than or equal to 0.5.

Printed circuit board capable of reducing return loss of differential signal and electronic device using the same

A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined.

System and method for checking signal transmission line

A via design method includes doing a simulation according to input data to obtain the impedance of the via of the reference printed circuit board (PCB). An optimal via model is determined according to a group of input data. Simulating is performed according to the thickness of a PCB to-be-designed and the optimal via model data, to obtain the impedance of a via of a PCB to be designed. The number of the anti-pads of the via of the PCB to be designed is recorded when the difference between the impedance of the via of the PCB to be designed and the impedance of the via model of the reference PCB does not fall within a preset range. An interval between each two adjacent anti-pads of the via of the PCB to designed is determined according to the recorded number and the thickness of the PCB to be designed.

System and method for designing via of printed circuit board

A signal transmission line check method to be executed by a computing device is described. A to-be-checked signal transmission line group in a displayed printed circuit board (PCB) layout is determined. Whether all signal transmission lines of the to-be-checked signal transmission line group are laid out in a same layer of the displayed PCB layout is checked according to an input serial number of a chipset and layer properties of the to-be-checked signal transmission lines. The signal transmission lines that do not satisfy design standards are determined when not all of the to-be-checked signal transmission lines are laid out in a same layer. A related computing device is also disclosed.

Computing device and method for checking signal transmission line

A pad includes a first mating section and a second mating section. The first mating section includes a first horizontal plane and a first inclined plane. The second mating section includes a second horizontal plane and a second inclined plane. The first mating section is a copper foil capable of being connected to a wire. The second mating section is made of insulating material. The first inclined plane and the second inclined plane are bonded together.

Soldering pad

A printed circuit board includes a signal layer and a reference layer. The signal layer is covered with copper foil. A circuit topology for multiple loads is set on the signal layer. The circuit topology includes a driving terminal, a first signal receiving terminal, and a second signal receiving terminal. The driving terminal is connected to a node through a first transmission line. The node is connected to the first and second signal receiving terminals respectively through a second and a third transmission lines. A difference between lengths of the second and third transmission lines is greater than a product of a transmission speed and a rise time of signals from the driving terminal. The reference layer is covered with copper foil, and arranged under the signal layer. A region without copper foil is formed on the reference layer, under the second transmission line.

Printed circuit board with circuit topology

A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length.

Computing device and method for checking via stub

In a computing device, computerized method, and a non-transitory storage medium, plug-in capacitors are selected from capacitors in a wiring diagram according pin information of the capacitors. A straight line is constructed for each of the plug-in capacitors according to size of holes where pins of the plug-in capacitor are to be inserted into. Paths of all transmission lines in the wiring diagram are obtained, and a determination of, whether any of the paths has at least one intersection point with at least one constructed straight line, is made. One or more paths, which have at least one intersection point with at least one constructed straight line, are recorded into a path list. The path list is then outputted using the computing device.

Computing device and method of checking wiring diagrams

In a method for checking layout of a printed circuit board (PCB) using an electronic device, a signal line is selected from a layout diagram of the PCB. The method searches for signal lines which have an acute angle when deviating from a straight line in the layout diagram of the PCB. The method further locates attribute data of the searched signal lines in the layout diagram of the PCB, and displays the attribute data of the searched signal lines on a display device of the electronic device.

Electronic device and method for checking layout of printed circuit board

A printed circuit board includes an insulation layer and a signal layer attached to the insulation layer. The signal layer includes a pair of differential transmission lines. Width W of each of the differential transmission lines is changed according to change of space S between the differential transmission lines, based on the following formula: In above formula, C1=7.475, C2=5.98, C3=0.48, C4=&#x2212;0.96, H is a thickness of the insulation layer, Wis an original width of each of the differential transmission lines, and Sis an original space between the differential transmission lines, and T is a thickness of each of the differential transmission lines.

Printed circuit board

A computer-based method and a computing device for checking signal transmission lines of a printed circuit board (PCB) layout are provided. The computing device identifies differential pairs in a currently run PCB layout according to an information file for the currently run PCB layout, checks whether any signal transmission line is routed between switching vias of each differential pair according to the information file for the currently run PCB layout, and displays a routing error window to display information of each misrouted signal transmission line.

In a method for verifying a printed circuit board (PCB) layout using a computing device, a PCB simulation file is obtained from a storage device of the computing device, and a PCB image is displayed on a display device according to the PCB simulation file. The PCB image includes multiple signal lines and switching voltage regulator nodes (SVRN). A SVRN to be checked is selected from the PCB image, and all signal lines around the SVRN are searched. The method calculates a layout distance between the selected SVRN and each of the searched signal lines, and generates a graphical window interface to position a signal line whose layout distance is equal to or less than the minimum distance. The method further modifies the layout of the positioned signal line to satisfy a layout design specification by increasing the layout distance to the minimum distance.

System and method for verifying PCB layout

A printed circuit board (PCB) includes two layers, two signal transmission traces, and a vertical interconnect access (via). The signal transmission traces are respectively arranged on the layers. The signal transmission traces are electrically connected to each other through the via. A centerline of the via with a vertical line of the layers form an acute angle &#x3b8;, the angle &#x3b8; is less than cos[(Lv&#x2212;Lt)/(Lv+Lt)]. Wherein Lt is loss of the two signal transmitting traces in a unit length, and Lv is loss of the via in a unit length.

A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad.

Computing device and method for checking distances between transmission lines and anti-pads arranged on printed circuit board

A computing device and a method selects a signal transmission line from a circuit board, computes an actual length of each line segment of the selected signal transmission line, and computes an actual distance between each line segment of the selected signal transmission line and a corresponding line segment of each neighboring signal transmission line. If each actual length is less than or equal to a corresponding reference length and each actual distance is more than or equal to a corresponding reference distance, the device and method determines a design of the selected signal transmission line satisfies the design standards. Otherwise, if any actual length is more than a corresponding reference length, or if any actual distance is less than a corresponding reference distance, the device and method determines the design of the signal transmission line does not satisfy the design standards.

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Taipei Hsien, Taiwan

Chia-Nan Pai