Taiwan Semiconductor Manufacturing Comp. Ltd.

Hfi Innovation Inc.

Industrial Technology Research Institute

Mediatek Corporation

National Yang Ming Chiao Tung University

Mediatek Singapore Pte. Ltd.

Chia-Ming Tsai

Chandrashekhar Prakash Savant

Tien-Wei Yu

Chih-Wei Hsu

Tzu-Der Chuang

Ching-Yeh Chen

Yu-Wen Huang

Shahaji B More

Ming-Te Chen

Chin-Kun Wang

Liang-Chen Chi

Ke-Chih Liu

Chun-Chia Chen

Miin-Jang Chen

Zhi-Yi Lin

Shih-Chi Lin

Yu-Min Chang

Kin Shun Chong

Shih-Ta Hsiang

Man-Shu Chiang

Chih-Wei Wang

Jhih-Jie Huang

Zack Chong

Han Huang

Yuh-Ta Fan

Chin-Chia Chang

Yung-Chien Liu

Yen-Yu Chen

Wei-Cheng Wang

Chen-Yen Lai

Yueh-Ching Pai

Mu-Tao Chu

Olena Chubach

Chia-Ching Lin

Bo-Wei Chen

Yu-Chi Su

Tzu-Yi Yang

Ming-Ching Kuo

Shih-Ching Huang

Ding-Wei Huang

Day-Uei Li

Rong-Heng Yuang

Tzu-Hsien Sang

Bo-Jyun Kuo

Yi-Tong Liu

Po-Hsuan Chang

Li-Tien Huang

Miin-Jang Cheng

Keng-Ham Lin

Wei-Lun Jian

Yu-Wei Chen

Ting-Yuan Wang

Ningkai Yang

Gate fabrication techniques are disclosed herein for providing gate stacks and/or gate structures (e.g., high-k/metal gates) with improved profiles (e.g., minimal to no warping, bending, bowing, and necking and/or substantially vertical sidewalls), which may be implemented in various device types. For example, gate fabrication techniques disclosed herein provide gate stacks with stress-treated glue layers having a residual stress that is less than about 1.0 gigapascals (GPa) (e.g., about −2.5 GPa to about 0.8 GPa). In some embodiments, a stress-treated glue layer is provided by depositing a glue layer over a work function layer and performing a stress reduction treatment, such as an ion implantation process and/or an annealing process in a gas ambient, on the glue layer. In some embodiments, a stress-treated glue layer is provided by forming at least one glue sublayer/metal layer pair over a work function layer, performing a poisoning process, and forming a glue sublayer over the pair.

Gate structure fabrication techniques for reducing gate structure warpage

Image or video processing methods and apparatuses comprise receiving input data associated with a current picture or a current slice in the current picture, determining whether the current picture is a monochrome picture, conditionally signaling or parsing chroma deblocking parameters depending on whether the current picture is a monochrome picture, and encode or decode the current picture or current slice. The chroma deblocking parameters are used in a deblocking filter operation applied to chroma components of the current picture or current slice when the current picture is not a monochrome picture. A syntax element may be used to indicate derivation of chroma deblocking parameters, and based on a value of the syntax element, the chroma deblocking parameters are allowed to be explicitly signaled in or parsed from a syntax structure, or the chroma deblocking parameters are implicitly inferred.

Methods and apparatuses of loop filter parameter signaling in image or video processing system

A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.

Method of manufacturing semiconductor devices and semiconductor devices

A video processing method for a video encoder or decoder comprises receiving input data of a current block, determining an intra prediction mode and reference samples according to the intra prediction mode, determining an intra reference sample filter from a Gaussian interpolation filter and an alternative interpolation filter for the current block, applying the intra reference sample filter to the reference samples to generate an intra predictor for the current block, and encoding or decoding the current block based on the intra predictor. A determination between the Gaussian and alternative interpolation filters is depending on a comparison of a mode difference value calculated by the intra prediction mode with a size-dependent threshold. The size-dependent threshold is set to be equal to 24 for blocks with block size smaller than or equal to 32 samples according to an embodiment. The alternative interpolation filter may be a DCT-IF interpolation filter.

Method and apparatus of encoding or decoding with mode dependent intra smoothing filter in intra prediction

A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.

Method and apparatus of luma-chroma separated coding tree coding with constraints

A LiDAR and a method of a fast photon-count integration for a LiDAR are disclosed. The proposed method, wherein the LiDAR includes a laser, includes: providing a target and the LiDAR; causing the laser to fire a laser pulse towards the target according to a random mechanism; and causing an interval between two adjacent laser pulses to be less than a time that the laser spent for a round trip of maximum unambiguous range to speed up a detection and a ranging of the target.

LiDAR and method of fast photon-count integration for LiDAR

The present disclosure describes a method for the formation of gate stacks having two or more titanium-aluminum (TiAl) layers with different Al concentrations (e.g., different Al/Ti ratios). For example, a gate structure can include a first TiAl layer with a first Al/Ti ratio and a second TiAl layer with a second Al/Ti ratio greater than the first Al/Ti ratio of the first TiAl layer.

Metal gate structures for field effect transistors

In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region made of a semiconductor material, a first work function adjustment material layer is formed over the gate dielectric layer, an adhesion enhancement layer is formed on the first work function adjustment material layer, a mask layer including an antireflective organic material layer is formed on the adhesion enhancement layer, and the adhesion enhancement layer and the first work function adjustment material layer are patterned by using the mask layer as an etching mask. The adhesion enhancement layer has a higher adhesion strength to the antireflective organic material layer than the first work function adjustment material layer.

A method includes providing a structure having a substrate, a semiconductor channel layer over the substrate, an interfacial oxide layer over the semiconductor channel layer, and a high-k gate dielectric layer over the interfacial oxide layer, wherein the semiconductor channel layer includes germanium. The method further includes forming a metal nitride layer over the high-k gate dielectric layer and performing a first treatment to the structure using a metal-containing gas. After the performing of the first treatment, the method further includes depositing a silicon layer over the metal nitride layer; and then annealing the structure such that a metal intermixing layer is formed over the high-k gate dielectric layer. The metal intermixing layer includes a metal oxide having metal species from the high-k gate dielectric layer and additional metal species from the metal-containing gas.

Semiconductor devices with metal intercalated high-k capping

The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

Gate stack treatment

A method and apparatus for video coding using Intra prediction are disclosed. In one method, a first prediction sample in an immediately right column of the current block and a second prediction sample in an immediately below row of the current block are derived using angular prediction. The first prediction sample and a left column reference sample in the same row as the first prediction sample are interpolated to generate a horizontal predictor. The second prediction sample and an above-row reference sample in the same column as the second prediction sample are interpolated to generate a vertical predictor. The vertical predictor and the horizontal predictor are linearly combined to generate an angular-planar prediction sample. In another method, a first predictor is generated using angular prediction and a second predictor is generated using planar prediction. The first predictor and the second predictor are linearly combined to generate a fused Intra predictor.

Method and apparatus for intra prediction fusion in image and video coding

The present disclosure describes method to form a semiconductor device having a gate dielectric layer with controlled doping and to form multiple devices with different V. The method includes forming a gate dielectric layer on a fin structure, forming a buffer layer on the gate dielectric layer, and forming a dopant source layer including a dopant on the buffer layer. The gate dielectric layer includes an interfacial layer on the fin structure and a high-k dielectric layer on the interfacial layer. The method further includes doping a portion of the high-k dielectric layer adjacent to the interfacial layer with the dopant, removing the dopant source layer and the buffer layer, forming a dopant pulling layer on the gate dielectric layer, and tuning the dopant in the gate dielectric layer by the dopant pulling layer.

In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a shield layer is formed over the first conductive layer forming a bilayer structure, a capping layer is formed over the shield layer, a first annealing operation is performed after the capping layer is formed, the capping layer is removed after the first annealing operation, and a gate electrode layer is formed after the capping layer is removed.

Video processing methods and apparatuses in a video encoding or decoding system for processing a video picture partitioned into blocks with one or more partition constraints. The video encoding or decoding system receives input data of a current block and checks whether a predefined splitting type is allowed to partition the current block according to first and second constraints. The first constraint restricts each sub-block partitioned from the current block to be completely contained in one pipeline unit, and the second constraint restricts each sub-block partitioned from the current block to contain one or more complete pipeline units. The pipeline units are non-overlapping units in the video picture designed for pipeline processing. The current block is not partitioned by the predefined splitting type if any sub-block partitioned by the predefined splitting type violates both the first and second constraints. The system encodes or decodes the current block.

Methods and apparatuses of processing video pictures with partition constraints in a video coding system

A device includes a semiconductor region, an interfacial layer over the semiconductor region, the interfacial layer including a semiconductor oxide, a high-k dielectric layer over the interfacial layer, and an intermixing layer over the high-k dielectric layer. The intermixing layer includes oxygen, a metal in the high-k dielectric layer, and an additional metal. A work-function layer is over the intermixing layer. A filling-metal region is over the work-function layer.

Transistors with reduced defect and methods of forming same

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Zhubei, Taiwan

Chia-Ming Tsai