Himax Technologies, Inc.

National Cheng-kung University

Ncku Research and Development Foundation

Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Chia-Min Lin

Soon-Jyh Chang

Chien-Hung Tsai

Kuen-Jong Lee

Guan-Ying Huang

Lih-Yih Chiou

Chung-Ho Chen

Chen-Fa Tsai

Che-Li Lin

Wen-Yu Su

Chung-Wei Huang

Chia-Ching Huang

You-Lun Deng

Te-Wei Peng

Chih-Hung Kuo

Kai-Chung Chan

Fa-Ta Chen

Liang-Chi Zane

A placement method for integrated circuit design is provided. Each net is considered as a soft module. The net will receive a larger penalty if it covers more routing congested regions. Therefore, it is easier to move the nets away from routing congested regions. In addition, to relieve local congestion, a novel inflation method is proposed to expand the area of a cluster according to its internal connectivity intensity and routing congestion occupied by the cluster. Accordingly, it can get better routability and wirelength.

Placement method and non-transitory computer readable storage medium

A simulated-evolution-based macro refinement method includes evaluating a score of each placed macro cell to be refined; generating a random number; determining whether the score satisfies a predetermined condition; placing the macro cell into a queue if the score associated with the macro cell satisfies the predetermined condition; and sorting and placing macro cells of the queue according to scores of the macro cells in the queue.

Method of placing macro cells and a simulated-evolution-based macro refinement method

A method of macro placement includes partitioning an entire region of a semiconductor chip into sub-regions; determining a packing sequence of a plurality of movable macros in the sub-region; extracting search points of a plurality of placed blocks in the sub-region with respect to one of the movable macros; determining a feasible region associated with the search point; packing said movable macro in the feasible region; evaluating a legalizing cost function; and determining whether a value of the evaluated legalizing cost function is less than a predetermined threshold value.

Method of macro placement and a non-transitory computer readable medium thereof

A multi-point temperature sensing method for integrated circuit chips and a system of the same are revealed. The system includes at least one slave temperature sensor embedded at preset positions for measuring temperature of a block and a master temperature sensor embedded in an integrated circuit chip and electrically connected to each slave temperature sensor. Variations of the slave temperature sensor induced by variations of process, voltage and temperature are corrected by the master temperature sensor. Thus the area the temperature sensors required on the integrated circuit chip is dramatically reduced and the stability of the temperature control system is improved. The problem of conventional System-on-a-Chip that only a limited number of temperature sensors could be used due to the area they occupied can be solved.

Multi-point temperature sensing method for integrated circuit chip and system of the same

A fixed-outline floorplanning approach for mixed-size modules is disclosed. Firstly, evenly distribute mixed-size circuit modules to whole chip area based on different requirements such as wire-length, routability, or thermal in the global distribution stage. To maintain the global distribution result and satisfy the fixed-outline constraint, generate a slicing tree by recursively applying partition algorithm to divide modules distributed in a given region into several sub-regions. Then, to remove overlap between circuit modules and find a best solution, use bottom-up shape curve merging and top-down back tracing procedure to generate a slicing tree. The shape curve for each leaf in the tree is built first by enumerated packing. Then, the curves in the tree are merged iteratively from bottom to top, and feasible solutions in the shape curve of the root node are identified according to the fixed-outline constraint. Finally, the best solution is determined by a top-down back tracing procedure.

Fixed-outline floorplanning approach for mixed-size modules

Growing community of inventors

Tainan, Taiwan

Chia-Min Lin