Winbond Electronics Corporation

National Yang Ming Chiao Tung University

Tsinghua University

National Taiwan University

Realtek Semiconductor Inc.

Chia-Hsiang Yang

Yeong-Luh Ueng

Shyh-Jye Jou

Jui-Hung Hung

Ping-Hsuan Hsieh

Yu-Cheng Tsai

Wei-Chang Liu

Chi-Wei Lo

Ching-Da Chan

Der-Zheng Liu

Mao-Ruei Li

Cheng-Yen Lee

Mao Ruei Li

Hao-Min Liu

Yung-Jen Lin

Chiao-En Chen

Hsin-Tzu Lin

Chun-Wei Chou

Yao-Pin Wang

Chi-Chih Wen

Chung-Jung Huang

Wei-Cheng Sun

Yi-Chung Wu

Wei-Hsuan Wu

A portable genome sequencing and genotyping device includes a sample processing module, a sequencing module, an analyzing module, and a communication module. The sample processing module is configured to process a sample so as to generate at least one DNA segment of the sample. The sequencing module is connected to the sample processing module, and is configured to generate a number of base sequences corresponding to the at least one DNA segment. The analyzing module is coupled to the sequencing module, and is configured to generate a genotyping analysis result based on the base sequences. The communication module is configured to receive the genotyping analysis result and transmit the genotyping analysis result to a user terminal.

Portable genome sequencing and genotyping device and operating method thereof

An iterative detection and decoding (IDD) circuit is provided. The iterative detection and decoding (IDD) circuit is configured to perform M outer iterations on a received signal, and Ninner iterations are performed during the iouter iteration of the M outer iterations, where M is an integer greater than 1, i is an integer less than or equal to M, and Nto Nare integers and include at least two different values.

Iterative detection and decoding circuit, iterative detection and decoding method and MIMO receiver

A method for DNA sequence alignment is proposed to include steps of: generating multiple strings by acquiring foremost k number of suffixes corresponding to a reference DNA sequence; grouping the strings into multiple string groups; sorting the strings in each of the string groups to generate sorting results; obtaining sorted suffixes and a suffix array based on the sorting results; establishing FM-index data based on the sorted suffixes and the suffix array; and performing DNA sequence alignment on a target string based on the FM-index data to obtain an alignment result.

Method and system for DNA sequence alignment

A wireless power transfer system includes a power supply side and a power reception side. The power supply side is configured to provide wireless power. The power reception side is electrically connected to the power supply side. The power reception side is configured to receive the wireless power and convert the wireless power into power of a required type. The power reception side includes an adiabatic circuit that operates at AC power and a memory circuit that operates at DC power. The adiabatic circuit includes a first circuit and a second circuit. When the first circuit operates during one of a working period and a waiting period, the second circuit operates during the other one of the working period and the waiting period.

Wireless power transfer system supplying power required by adiabatic circuit

A master-slave flip-flop includes a master latch, a slave latch, a first logic gate and a signal transition detector. The first logic gate is receiving a reference clock and a first control clock, and outputting a first trigger signal to control one of the master latch and the slave latch, which are connected with a logic circuit, to switch to an opaque state or a transparent state, wherein the other one of the master latch and the slave latch is switched to an opaque state or a transparent state according to the reference clock. The above-mentioned master-slave flip-flop can correct sampling when a timing error occurs.

Master-slave flip-flop

An iterative decoding device applied for a SISO (soft input soft output) system is disclosed, which comprises an operational control unit, a first decoder, and a second decoder. The operational control unit is operative to receive an encoded signal and divide the encoded signal into at least one frame. The first decoder is operative to receive each of the at least one frame and derive a renewed intrinsic information by a first iteration operation. The second decoder is operative to derive soft-information by a second iteration operation based on the renewed intrinsic information, and then transmit the soft-information back to the first decoder for the iteration operation of the next renewed intrinsic information. The operational control unit makes the at least one frame to be calculated respectively by the first decoder and the second decoder, thereby improving the efficiency and error ratio of a receiver.

SISO (soft input soft output) system for use in a wireless communication system and an operational method thereof

An extreme index finder and a digital value finding method are provided. The extreme index finder includes a plurality of digital-to-time converters (DTCs) and a first arbiter apparatus. The DTCs respectively receive a plurality of input signals and perform a digital-to-time converting operation on each of the input signals to respectively generate a plurality of time-domain signals. The first arbiter apparatus finds a position of a extreme value in the time-domain signals according to transition speeds of the time-domain signals and compares transition speed of the extreme value with each of the time-domain signals to find an extreme input signal corresponding to the extreme value in the input signals.

Extreme index finder and finding method thereof

A sampling circuit includes a first latch, a second latch and a signal transition detector. The first latch is disposed on an upstream side of a logic circuit. The second latch is disposed on a downstream side of the logic circuit. The first latch and the second latch respectively switch to opposite states of an opaque state or a transparent state according to trigger signals generated by a reference clock and a control clock. The signal transition detector is configured for detecting whether the signal outputted by the logic circuit is in error or not and outputting a corresponding control clock. The above-mentioned sampling circuit can delay switching the second latch to the opaque state and switching the first latch to the transparent state to correct sampling when a timing error occurs.

Sampling circuit

A data allocating apparatus, a signal processing apparatus, and a data allocating method thereof are provided. A plurality of storage units sequentially arranged is provided. A control unit of the data allocating apparatus determines whether the single period output data has the longest storing time in Real-valued Fast Fourier transform (RFFT) output data according to a lifetime analysis, wherein the storing time is a time that the RFFT output data is stored in storage units. The single period output data having the longest storing time is inputted into first storage units of the storage units, and the single period output data not having the longest storing time is inputted into second storage units of the storage units by the control unit. The first storage units are arranged at the last of the storage units, and the second storage units are arranged in front of the first storage units.

Data allocating apparatus, signal processing apparatus, and data allocating method

An energy recycling system and an energy recycling method are disclosed. The energy recycling system includes several working circuits and a first energy recycling circuit. The working circuits include at least one first working circuit and at least one second working circuit. The first energy recycling circuit is coupled between the first working circuits and the second working circuits. The first alternating-current-type (AC-type) voltage source is supplied to the first working circuits and the second working circuits. The energy loss of the first AC-type voltage source is replenished by a direct-current-type (DC-type) voltage source. The first energy recycling circuit includes an inductor and pairs of switches, and the pairs of switches are configured for conducting in different time sequences and transferring the energy of the first AC-type voltage source between the first working circuits, the inductor and the second working circuits.

Energy recycling system and recycling method thereof

A multiple input multiple output wireless communication system and a channel decomposition method thereof are provided. The wireless communication system includes a precoding unit, a channel estimation unit, a channel decomposition unit and a quantization unit. The precoding unit receives a plurality of transmission data streams and a quantized wireless channel information to provide a plurality of transmission symbols to a wireless channel. The channel estimation unit estimates the wireless channel to provide a channel matrix. The channel decomposition unit makes a plurality of elements in a diagonal the same real numbered elements through matrix rations and matrix decompositions, and correspondingly rotates a first unit matrix and a second unit matrix to obtain a channel state information. The quantization unit provides the wireless channel information according to the channel state information.

Multiple input multiple output wireless communication system and channel decomposition method thereof

A method for constrained power allocation in a multiple input multiple output (MIMO) system, including: executing a singular value decomposition (SVD) operation upon a channel matrix; obtaining a diagonal matrix, wherein the diagonal matrix is composed of a plurality of local matrixes; and transforming diagonal elements of the diagonal matrix into diagonal elements of a specific diagonal vector from an upper-left corner local matrix and a lower-right corner local matrix, in parallel, simultaneously, and according to a sequence, by using a generalized triangular decomposition.

Method and system for constrained power allocation in the multi-input multi-output systems

A multiple input multiple output wireless communication system and a channel decomposition method thereof are provided. The wireless communication system includes a precoding unit, a channel estimation unit, a channel decomposition unit and a quantization unit. The precoding unit receives a plurality of transmission data streams and wireless channel information to provide a plurality of transmission symbols to a wireless channel. The channel estimation unit estimates the wireless channel to provide a channel matrix. The channel decomposition unit makes a plurality of elements on a diagonal and adjacent to a side of the diagonal as real numbered elements through an element ration and correspondingly rotates a first unit matrix and a second unit matrix to obtain channel state information. The quantization unit provides the wireless channel information according to the channel state information.

An unequal bit-reliability information storage method for communication and storage systems at least includes one storage unit having a first memory and a second memory; the most significant information bits are stored in the first memory; and least significant information bits are stored in the second memory. Based on the significance of each bit of the information with the use of the first or second memories of different reliability for storage, the complexity of the storage unit, the production cost and the power consumption can be reduced while maintaining the performance.

Growing community of inventors

Taipei, Taiwan

Chia-Hsiang Yang