Taiwan Semiconductor Manufacturing Comp. Ltd.

Chia-Hong Wu

Alexander Kalnitsky

Kong-Beng Thei

Chien-Chih Chou

Yi-Huan Chen

Hsiao-Chin Tuan

Ta-Wei Lin

Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming a stack of gate layers over a substrate. The stack of gate layers includes a first dielectric layer on the substrate, a conductive layer on the first dielectric layer, and a polysilicon layer on the conductive layer. A pair of source/drain regions is formed on opposing sides of a central region of the polysilicon layer. The central portion of the polysilicon layer is converted to a first silicide layer. The first silicide layer is spaced between inner sidewalls of the polysilicon layer.

FUSI gated device formation

Various embodiments of the present disclosure are directed towards an integrated chip including a gate dielectric structure over a substrate. A metal layer overlies the gate dielectric structure. A conductive layer overlies the metal layer. A polysilicon layer contacts opposing sides of the conductive layer. A bottom surface of the polysilicon layer is aligned with a bottom surface of the conductive layer. A dielectric layer overlies the polysilicon layer. The dielectric layer continuously extends from sidewalls of the polysilicon layer to an upper surface of the conductive layer.

Various embodiments of the present disclosure are directed towards a method for forming a fully silicided (FUSI) gated device, the method including: forming a masking layer onto a gate structure over a substrate, the gate structure comprising a polysilicon layer. Forming a first source region and a first drain region on opposing sides of the gate structure within the substrate, the gate structure is formed before the first source and drain regions. Performing a first removal process to remove a portion of the masking layer and expose an upper surface of the polysilicon layer. The first source and drain regions are formed before the first removal process. Forming a conductive layer directly contacting the upper surface of the polysilicon layer. The conductive layer is formed after the first removal process. Converting the conductive layer and polysilicon layer into a FUSI layer. The FUSI layer is thin and uniform in thickness.

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Hsinchu, Taiwan

Chia-Hong Wu