Marvell International Limited

Chi-Yuen Young

Mao Yu

Xiangdong Jin

In accordance with the teachings described herein, system and methods are provided for a GPS acquisition correlation scheme with a reduced memory requirement. An example system may include a memory, a local PRN code generator, correlators, adder trees, an accumulator, and an output memory. The memory may be used to store an input PRN code. The local PRN code generator generates a replica PRN code and outputs a replica PRN code. The local PRN code generator may also shift the replica PRN code for each output epoch. One or more correlators receive the input PRN code and the replica PRN code and compare a bit of the input PRN code to a bit of the replica PRN code and generates a comparison. The adder trees add the comparisons and generate a comparison output. An accumulator accumulates the comparison output and outputs an accumulated output to an output memory.

Method and apparatus for correlating global positioning system (GPS) pseudorandom noise (PRN) codes

A system includes a memory with columns and rows. A sampler samples a first portion of a signal during first periods to obtain sets of samples, respectively. The sets of samples include a first set having first samples and a second set having second samples. A first controller writes each set in the sets of samples in a respective one of the columns. The first controller writes: the first samples in a first column such that each of the first samples is stored in a respective one of the rows; the second samples in a second column such that each of the second samples is stored in a respective one of the rows; and the second samples in the second column subsequent to writing the first samples in the first column. A second controller reads third samples stored in a first row and fourth samples stored in a second row.

Apparatus and method for writing and reading samples of a signal to and from a memory

Apparatus having corresponding methods and non-transitory computer-readable media comprise: a sampler configured to sample a signal, wherein the signal is modulated with a waveform having a known period, wherein the sampler obtains K samples in each period, and wherein each of the samples is N bits long, wherein K is an integer greater than 0, and N is an integer greater than 1; a memory bank, wherein the memory bank has M columns and K rows, wherein each column is N bits wide, and wherein M is an integer greater than 0; a write controller configured to write the samples to the memory bank in column order; a read controller configured to read the samples from the memory bank in row order; and an integrator configured to integrate the samples read from the memory bank, wherein the integrator provides a respective integration result for each row.

Growing community of inventors

Hong Kong, China

Chi-Yuen Young