Intel Corporation

Intel IP Corporation

Chi-Taou Robert Tsai

Lillian G Lent

Curtiss D Roberts

Cindy Muir

Patrick Rakers

Haolu Xie

An inductor has a conductor layer formed by multiple concentric co-planar turns of a first metal layer (e.g., ultra-thick metal (UTM)) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of the first metal layer proceed from an innermost turn to an outermost turn, and a stacking layer of a second metal is provided over each of the first metal layer turns except at least the innermost turn, thereby optimizing the Q of the inductor.

Stacked metal inductor

An inductor has a conductor layer formed by multiple concentric co-planar turns of ultra-thick metal (UTM) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of UTM proceed from an innermost turn to an outermost turn, and aluminum stacking is provided over all of the UTM turns except at least the innermost turn, thereby optimizing the Q of the inductor.

An integrated circuit (IC) comprises a plurality of metal layers; a seal ring arranged around a perimeter of the IC and included in at least a portion of the plurality of metal layers; a first coil included in the IC; and a bypass conductor included in at least one metal layer of the plurality of metal layers and having at least a first end and a second end electrically coupled to the seal ring to form a bypass ring around the first coil.

Bypass ring to improve noise isolation of coils and inductors

An apparatus includes a first differential transmission line and a second differential transmission line. The second differential transmission line is parallel to the first differential transmission line through an overlap region. The first differential transmission line includes a first line and a second line. The first differential transmission line includes N crossovers along the first differential transmission line through the overlap region at which the first line and the second line switch lanes with each other. N is equal to 1+INT {L/(&#x3bb;/C)}, where L is a length of the overlap region, &#x3bb; is a wavelength of a differential signal carried by the first or second differential transmission line, C is a constant, and INT {L/(&#x3bb;/C)} is {L/(&#x3bb;/C)} rounded down to the nearest integer.

Isolating differential transmission lines

A shield for differential transmission lines formed in a first metal layer may include one or more floating shields, each floating shield comprising an upper-side tile formed in a second metal layer of the integrated circuit adjacent to the first metal layer, a lower-side tile formed in a third metal layer of the integrated circuit adjacent to the first metal layer and non-adjacent to the second metal layer, and at least one via configured to electrically couple the upper-side tile at an end of the length of the upper-side tile to the lower-side tile and at an end of the length of the lower-side tile.

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Chandler, AZ, United States of America

Chi-Taou Robert Tsai