National Yang Ming Chiao Tung University

Chi-Shin Chang

Ching-Te Chuang

Ming-Hsien Tu

Wei Hwang

Li-Wei Chu

Hao-I Yang

Nan-Chun Lien

Shyh-Jye Jou

Po-Tsang Huang

Shu-Lin Lai

Chien-Yu Lu

Wei-Nan Liao

Chien-Hen Chen

A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needs to be boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage.

Control circuit of SRAM and operating method thereof

A static random access memory includes a pre-charger, a first cell column array/peripheral circuit, and a first ripple buffer. The pre-charger is connected to a first local bit line in order to pre-charge the first local bit line. The first cell column array/peripheral circuit is connected to the first local bit line and has a plurality of cells for temporarily storing data. The cells are connected to the first local bit line. The first ripple buffer is connected to the first local bit line and a second local bit line in order to send the data from the first local bit line to the second local bit line.

Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performance

Growing community of inventors

Taichung, Taiwan

Chi-Shin Chang