Samsung Electro-mechanics Co., Ltd.

Chi Seong Kim

Seong Min Cho

Jung Youn Pang

Eun Sun Kim

Won Seok Lee

Dong Jun Lee

Jin Uk Lee

Dong Ju Jeon

Gun Hwi Hyung

Eun Heay Lee

Guh Hwan Lim

Jin Oh Park

Jin Su Park

Sang Moon Lee

Sang Yun Lee

Jeong Bok Kwak

Chang Hwa Park

Choon Keun Lee

Seung Hyun Ra

Sa Yong Lee

Jae Choon Cho

Young Hun You

Jun Il Kang

Jae Heun Lee

Jung Woo Lee

Deok Man Kang

Shimoji Teruaki

Yo Han Song

Yu Mi Kim

A printed circuit board includes a first insulating layer having a through cavity and containing an insulating material. A length between one side surface and the other side surface opposite to the one side surface of the through cavity is greater than a thickness of the first insulating layer, and the first insulating layer includes a recess located in each of an upper edge and a lower edge of the one side surface of the through cavity.

Printed circuit board and method for manufacturing the same

A printed circuit board includes: a first insulating material; and a second insulating material disposed on one surface of the first insulating material, and including first and second cavities having depths different from each other. At least one groove portion is disposed in a side surface of each of the first and second cavities.

Printed circuit board

A printed circuit board includes a first insulating layer; a protective filler layer disposed on one surface of the first insulating layer; a first wiring layer disposed on the one surface of the first insulating layer and having a pad protruding with respect to the protective filler layer; a first via passing through the first insulating layer and contacting the pad; and a second insulating layer disposed on the first wiring layer and the protective filler layer, and having a cavity exposing the pad and at least a portion of the protective filler layer, respectively.

A substrate with an electronic component embedded therein includes: a core structure having a cavity; a metal layer disposed on a bottom surface of the cavity of the core structure; and an electronic component disposed on the metal layer in the cavity of the core structure. The substrate with the electronic component embedded therein has an excellent heat dissipation effect.

Substrate with electronic component embedded therein

A coil electronic component includes a body including a plurality of insulating layers and coil patterns disposed on the insulating layers, and external electrodes formed on external surfaces of the body and connected to the coil patterns, wherein the external electrodes include first layers being electroless plating layers and second layers formed on the first layers and having a form in which metal particles are dispersed in a polymer base, respectively.

Coil electronic component

An electroless surface treatment plated layer of a printed circuit board, a method for preparing the same, and printed circuit board including the same. The electroless surface treatment plated layer includes: electroless nickel (Ni) plated coating/palladium (Pd) plated coating/gold (Au) plated coating, wherein the electroless nickel, palladium, and gold plated coatings have thicknesses of 0.02 to 1 &#x3bc;m, 0.01 to 0.3 &#x3bc;m, and 0.01 to 0.5 &#x3bc;m, respectively. In the electroless surface treatment plated layer of the printed circuit board, a thickness of the nickel plated coating is specially minimized to 0.02 to 1 &#x3bc;m, thereby making it possible to form an optimized electroless Ni/Pd/Au surface treatment plated layer.

Electroless surface treatment plated layers of printed circuit board and method for preparing the same

There is provided an electrode pad including: a connection terminal part; a first plating layer including palladium phosphorus (Pd&#x2014;P) formed on the connection terminal part; and a second plating layer including palladium (Pd) formed on the first plating layer.

Electrode pad, printed circuit board using the same, and method of manufacturing printed circuit board

Disclosed is a method of manufacturing a printed circuit board for fine circuit formation, in which an unnecessary metal layer formed on the upper portion of a circuit pattern is removed through mechanical polishing and then chemical etching. In place of expensive chemical mechanical polishing, in the method of the invention, mechanical polishing and chemical etching are continuously applied to thus sequentially remove and planarize the unnecessary metal layer. Thereby, through an inexpensive, simple, and continuous process, the planarization procedure can be precisely performed, thus making it possible to apply the method to large areas and economically realize a fine circuit pattern.

Method of manufacturing printed circuit board for fine circuit formation

Growing community of inventors

Suwon-si, South Korea

Chi Seong Kim