United Microelectronics Corp.

Chi-Rong Lin

Horng-Bor Lu

Wen-Yi Hsieh

Chih-Sheng Chang

Jenn-Tarng Lin

Chen-Bin Lin

Yi-Tyng Wu

Ching-Chung Chen

Chun-Hsing Tung

Huai-Hsuan Tsai

Nien-Chung Jiang

Tung-Hu Lin

Tze-Jing Chen

Nien-Chung Chiang

Hung-Yi Huang

A process of physical vapor depositing mirror layer with improved reflectivity is disclosed. A wafer is loaded into a PVD tool comprising a degas chamber, a Ti/TiN sputter deposition chamber, a cooling chamber, and an aluminum sputter deposition chamber. A wafer degas process is first performed within the degas chamber. The wafer is then transferred to the Ti/TiN sputter deposition chamber and deposition sputtering a layer of titanium onto the wafer. The wafer is transferred to the cooling chamber and gas cooling the wafer temperature down to 40-50&#xb0; C. The wafer is then transferred to the aluminum sputter deposition chamber and deposition sputtering a layer of aluminum onto the wafer at 40-50&#xb0; C. with a backside gas turned off. The deposited layer of aluminum over the wafer has a reflectivity of about 0.925 at wavelength of around 380 nm.

Process of physical vapor depositing mirror layer with improved reflectivity

A method for manufacturing a complementary metal-oxide semiconductor sensor is provided. The present method provides a semiconductor structure including a plurality of conductors thereon. An inter-metal dielectric layer is formed on the conductors. A silicon nitride film is applied on the inter-metal dielectric layer. An oxide layer is formed on the silicon nitride film. The oxide layer, the silicon nitride film and the inter-metal dielectric are etched to expose portions of the conductors. The oxide layer and the exposed conductors are cleaned in a cleaning step later.

Method for manufacturing a complementary metal-oxide semiconductor sensor

A method of fabricating an image sensor on a semiconductor substrate including a sensor array region is introduced. First, an R/G/B color filter array (CFA) is formed on portions of the semiconductor substrate corresponding to the sensor array region. Then, a spacer layer is formed on the R/G/B CFA, and a plurality of U-lens is formed on the spacer layer corresponding to the R/G/B CFA. Afterwards, a buffer layer is coated to fill a space between the U-lens, and a low-temperature passivation layer is deposited on the buffer layer and the U-lens at a temperature of about 300&deg; C. or less to prevent the R/G/B CFA from damage.

Method of fabricating an image sensor

A method for forming a barrier/glue layer above the polysilicon layer of a MOS transistor gate comprising the step of providing a semiconductor substrate, and then forming a gate oxide layer above the substrate. Next, a polysilicon layer is formed over the gate oxide layer. Thereafter, a titanium layer is deposited over the polysilicon layer first, and then a titanium nitride layer is deposited above the titanium layer. This titanium/titanium nitride bi-layer is capable of increasing the adhesive strength with a subsequently deposited tungsten silicide layer, and preventing the peeling of the tungsten silicide layer. Furthermore, the titanium nitride layer acts as a barrier for fluorine atoms preventing their diffusion to the gate oxide layer/polysilicon layer interface, and affecting the effective thickness of the gate oxide layer. In the subsequent step, a tungsten suicide layer is formed above the titanium nitride layer. Finally, after an annealing operation, the titanium layer will react with the silicon in the polysilicon layer and the tungsten silicide layer to form a titanium silicide layer. Hence, the resistance of the polycide layer in a MOS transistor gate can be reduced.

Barrier/glue layer on polysilicon layer

A method for reducing the stress on a titanium nitride layer formed by collimator sputtering. On a semiconductor substrate, an insulated oxide layer is formed. A trench is formed in the insulated oxide layer. On the trench, a first titanium nitride layer is formed conformally by using physical or chemical vapor deposition as a buffer layer. A second titanium nitride layer is formed by collimator sputtering on the first titanium layer. The orientation of lattice arrangement of the second titanium nitride layers is changed from &lt;100&gt;-orientation to &lt;111&gt;-orientation, and therefore, the stress is reduced.

Method for reducing stress on collimator titanium nitride layer

A method of forming a metal plug. A contact window is formed to penetrate through a dielectric layer on a substrate having a MOS formed thereon. A titanium glue layer is formed on the dielectric layer and the circumference of the contact window. A titanium barrier layer is formed on the titanium nitride layer. Using nitrogen plasma bombardment on the titanium nitride layer, the structure of the titanium nitride layer is transformed. The number of the nucleation seeds is increased, and the size of grains is reduced. A metal layer is formed on the titanium nitride layer and fills the contact window. A part of the metal layer is removed and a metal plug within the contact window is formed.

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Chang-Hua Hsien, Taiwan

Chi-Rong Lin