Macom Technology Solutions Holdings, Inc.

Avago Technologies International Sales Pte. Limited

Chi Mo

Cristiano Bazzani

Brendan Foley

Michelle Dowling

Xicheng Jiang

Jungwoo Song

Vinay Chandrasekhar

Quazi Ikram

Andrew Patterson

Xiaofeng Lin

Andrzej Rozbicki

Darwin Cheung

Donghai Wang

Ahmad Yazdi

Kareem Abdelghani Ibraheem Mohamed Ragab

A device (e.g., SAR ADC device) include a DAC circuit and generates a digital output based on logic circuitry that includes SAR logic. Additional logic circuitry includes delta modulation circuitry and dynamic element matching circuitry. The delta modulation circuitry provides several digital outputs of the SAR DAC, while the dynamic element matching circuitry selects a different set of capacitors from the DAC circuit. Each cycle is added together and averaged, and then added to the digital output from the SAR logic.

Incremental delta modulation for analog to digital converter signal to noise ratio and linearity enhancement

An analog to digital converter temperature compensation system comprising a comparator configured to compare an analog input signal to a compensated feedback signal and generate a comparator output. A SAR module processes the comparator output to generate a digital signal. A digital to analog converter, biased by a biasing signal having temperature change induced error, is configured to convert the digital signal to a feedback signal and a detector is configured to detect a signal that is proportional to temperature. A look-up table is configured to receive and convert the signal that is proportional to temperature to a compensation signal such that the compensation signal compensates for the temperature change induced error in the biasing signal. A summing node combines the feedback signal with the compensation signal to create a compensated feedback signal.

Method and apparatus to correct ADC gain error induced from temperature drift

A multi-voltage converter is described that includes integrated temperature-protection circuitry. The converter may be used to bias radio-frequency components such as PIN diodes and gallium-nitride devices, and may include integrated bias-sequencing circuitry. Programmable output voltages as high as 30 volts and as low as &#x2212;20 volts may be generated.

Integrated solution for multi-voltage generation with thermal protection

A circuit and method provide a headroom voltage for a laser driver driving a laser diode such that the laser diode provides signals to an optical communications device. The circuit includes a headroom control circuit receiving the headroom voltage from the laser driver, the headroom control circuit generating a controlled voltage based on the headroom voltage, and a DC-DC converter receiving the controlled voltage from the headroom control circuit generating a voltage Vout based on the controlled voltage, and applying the voltage Vout as an input to the laser diode. The headroom control circuit and the DC-DC converter are connected in a feedback loop with the laser diode to continuously provide the voltage Vout to the laser diode, and the DC-DC converter modifies the voltage Vout to compensate for burn-in characteristics or temperature drift of the laser diode over time to maintain an optimized headroom voltage for the laser driver.

Efficiency improved driver for laser diode in optical communication

Driving circuitry is described that includes multiple programmable bias voltages useful for biasing radio-frequency components such as PIN diodes and gallium-nitride devices. Programmable voltages as high as 30 volts and as low as &#x2212;20 volts are generated. The drive circuitry can operate from a single, low-voltage power source.

Programmable biasing for pin diode drivers

In one example, a device having integrated package interference isolation includes a ground pad, an integrated circuit device die secured to the ground pad, a substrate secured to the ground pad, at least one a high-frequency, high-power semiconductor device secured to a top mounting surface of the substrate. For electromagnetic isolation, the integrated circuit device die includes a top metal, and the substrate includes a metal via electrically coupled to a metal trace that extends on the top mounting surface of the substrate. The device package also includes a number of ground pad bonding wires that electrically couple the redistribution layer of the integrated circuit device die and the metal trace to the ground pad. The redistribution layer of the integrated circuit device die and the metal trace and via of the substrate help to shield electromagnetic radiation between components in the device package.

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Irvine, CA, United States of America

Chi Mo