Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Other

Hermes Testing Solutions Inc.

Chi-Ming Yang

Chin-Hsiang Lin

Nai-Han Cheng

Chun-Lin Louis Chang

Chyi Shyuan Chern

Tze-Liang Lee

Jr-Hung Li

Chih-Cheng Liu

Ying-Hsueh Chang Chien

Yen-Yu Chen

Chih-Hong Hwang

Yi-Chen Kuo

Ming-Hsi Yeh

Ming-Hui Weng

Yahru Cheng

James Jeng-Jyi Hwang

Yu-Ming Lee

Ching-Yu Chang

Su-Horng Lin

Jiann Lih Wu

Jia-Lin Wei

Kuo-Sheng Chuang

Shao-Yen Ku

Tsiao-Chen Wu

Chung-Chieh Lee

Bo-I Lee

He Hui Peng

Feng Yuan Hsu

Lin-Jung Wu

Simon Su-Horng Lin

Ying-Hsueh Changchien

Chia-Hung Huang

Chyi-Shyuan Chern

Soon-Kang Huang

Chin-Ming Lin

Huang Soon Kang

Jeng-Jyi Hwang

Ryan Chia-Jen Chen

Ching-Hsiang Hsu

Hsu-Shui Liu

Jong-I Mou

Hsien-Hsin Lin

Hsu-Kai Chang

Hsin-Hsien Wu

Jun-Lin Yeh

Kuo Bin Huang

Jyh-Shiou Hsu

Man-Kit Leung

Jih-Jse Lin

Zin-Chang Wei

Ming-Yu Fan

Yen-Chao Lin

Horng-Huei Tseng

You-Hua Chou

Chen-Yu Liu

Shwang-Ming Jeng

Yi-Fang Pai

Wen-Yu Ku

Hui OuYang

Han-Hsin Kuo

Shu-Hao Huang

Jia-Liang Chen

Jo-Fei Wang

Chung-Ru Yang

Ssu-Yi Li

Jui-Hsiung Liu

Tzu Jeng Hsu

Wan-Lai Chen

Jui-Hung Fu

Hsin-Yi Wu

Chih-Wei Lin

Fu-Liang Yang

Heng-Hsin Liu

Yun-Yue Lin

Yung-Yao Lee

Chun-Yi Lee

Chih-Cheng Lin

Jui-Chun Peng

Jo Fei Wang

Yen-Di Tsen

Matt Yeh

Shun Wu Lin

Yung-Cheng Chen

Fan-Yi Hsu

Sheng-Fan Yang

Tzu-Sou Chuang

Yu-Fu Lin

Jason Shen

Wen-Yuan Hsu

Ming-Tsao Chiang

Chung-Hsin Lu

An-Dih Yu

Jeng-Shin Ma

Sih-Ying Chang

Cheng-Lung Chou

Albert Po Chia Chen

Hsin-Chien Lu

Yu-Fen Tzeng

Yong-Jian Liu

A semiconductor packaging device includes a packaging module, a heat dissipation cover and a thermal interface material layer. The package module includes a substrate, and a working chip mounted on the substrate. The heat dissipation cover includes a metal cover fixed on the substrate and covering the working chip, an accommodating recess located on the metal cover to accommodate the working chip, and a plurality of protrusive columns respectively formed on the metal cover and distributed within the accommodating recess at intervals. The depth of the accommodating recess is greater than the height of each protrusive column, and the accommodating recess is greater than the working chip. The thermal interface material layer is non-solid, and located within the accommodating recess between the protrusive columns to wrap the protrusive columns and contact with the working chip, the metal cover and the protrusive columns.

Semiconductor packaging device and heat dissipation cover thereof

Metal-comprising resist layers (for example, metal oxide resist layers), methods for forming the metal-comprising resist layers, and lithography methods that implement the metal-comprising resist layers are disclosed herein that can improve lithography resolution. An exemplary method includes forming a metal oxide resist layer over a workpiece by performing deposition processes to form metal oxide resist sublayers of the metal oxide resist layer over the workpiece and performing a densification process on at least one of the metal oxide resist sublayers. Each deposition process forms a respective one of the metal oxide resist sublayers. The densification process increases a density of the at least one of the metal oxide resist sublayers. Parameters of the deposition processes and/or parameters of the densification process can be tuned to achieve different density profiles, different density characteristics, and/or different absorption characteristics to optimize patterning of the metal oxide resist layer.

In-situ deposition and densification treatment for metal-comprising resist layer

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Photoresist layer surface treatment, cap layer, and method of forming photoresist pattern

A method includes placing a wafer on a rotation mechanism of a metrology device; illuminating, by using a light source of the metrology device, the wafer by an X-ray; rotating, by using the rotation mechanism, the wafer while illuminating the wafer by the X-ray; detecting, by using an image sensor of the metrology device, a transmission portion of the X-ray passing through the wafer while rotating the wafer; and obtaining, by using a processor of the metrology device, a top width and a bottom width of a structure over the wafer based on the transmission portion of the X-ray with different rotating angles of the rotation mechanism.

Metrology method

A lithography method to pattern a first semiconductor wafer is disclosed. An optical mask is positioned over the first semiconductor wafer. A first region of the first semiconductor wafer is patterned by directing light from a light source through transparent regions of the optical mask. A second region of the first semiconductor wafer is patterned by directing energy from an energy source to the second region, wherein the patterning of the second region comprises direct-beam writing.

Semiconductor lithography system and/or method

The present disclosure provides a method for forming a semiconductor structure, including dispensing a dehydrating chemical over a fin of a substrate, wherein the dehydrating chemical includes a first chemical, and a second chemical having a melting point greater than the melting point of the first chemical, and solidifying the dehydrating chemical.

Method for forming a semiconductor structure using dehydrating chemical, and method for forming a semiconductor structure

Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MRX, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1≤a≤2, b≥1, c≥1, and b+c≤5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.

Method of manufacturing a semiconductor device

A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MRX, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1≤a≤2, b≥1, c≥1, and b+c≤4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.

Method of manufacturing a semiconductor device and pattern formation method

In a pattern formation method, a photoresist layer is formed over a substrate by combining a first precursor and a second precursor in a vapor state to form a photoresist material. The first precursor is an organometallic having a formula MRX, where M is one or more selected from the group consisting of Sn, Bi, Sb, In, and Te, R is an alkyl group that is substituted by different EDG and/or EWG, X is a halide or sulfonate group, and 1≤a≤2, b≥1, c≥1, and b+c≤4. The second precursor is water, an amine, a borane, and/or a phosphine. The photoresist material is deposited over the substrate, and selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

An organometallic precursor for extreme ultraviolet (EUV) lithography is provided. An organometallic precursor includes a chemical formula of MXL, where M is a metal, X is a multidentate aromatic ligand that includes a pyrrole-like nitrogen and a pyridine-like nitrogen, L is an extreme ultraviolet (EUV) cleavable ligand, a is between 1 and 2, b is equal to or greater than 1, and c is equal to or greater than 1.

Photoresist for semiconductor fabrication

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

An organometallic precursor for extreme ultraviolet (EUV) lithography is provided. An organometallic precursor includes an aromatic di-dentate ligand, a transition metal coordinated to the aromatic di-dentate ligand, and an extreme ultraviolet (EUV) cleavable ligand coordinated to the transition metal. The aromatic di-dentate ligand includes a plurality of pyrazine molecules.

A method for polishing a semiconductor substrate includes the following operations. A semiconductor substrate is received. An abrasive slurry having a first temperature is dispensed to a polishing surface of a polishing pad. The semiconductor substrate is polished. The abrasive slurry have a second temperature is dispensed to the polishing surface of the polishing pad during the polishing of the semiconductor substrate. The second temperature is different from the first temperature.

Method for polishing semiconductor substrate

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Hsinchu, Taiwan

Chi-Ming Yang