Taiwan Semiconductor Manufacturing Comp. Ltd.

Chi-Min Hsieh

Chwei-Ching Chiu

Wen-Teng Wu

A method for forming a semiconductor test carrier including an insulating substrate having a top surface, a bottom surface, periphery; with a rectangular cavity centrally located on the top surface and extending through to the bottom surface. A conductive ground trace formed on the top surface at the periphery of the cavity with conductive corner power traces formed adjacent each corner of the ground trace, with a ruled pattern of conductive wire bond pads encircling the corner power traces. Wire bond pads are formed in a linear array on each of the four sides encircling the power traces. A first interstitial ball pad array encircles the conductive wire bond pads and connects with the bottom surface by way of conductive vias communicating with a second interstitial ball pad array at the bottom surface. A glass plate is attached to the underside of the insulated substrate to form a bottom supporting surface in the rectangular cavity. A semiconductor device is placed in the cavity and its backside adhesively bonded to the glass plate. The appropriate input/output terminals of the device are connected to appropriate wire bond pads and traces on the top surface of the substrate with metallurgically bonded conductive wire. The exposed ends of the wires are encapsulated with a sealing polymer.

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Kaohsiung, Taiwan

Chi-Min Hsieh