Taiwan Semiconductor Manufacturing Comp. Ltd.

Chi-Lung Lin

Kong-Beng Thei

Li-Don Chen

Tung-Lung Lai

Chun-Lung Cheng

Hsi-Chien Lin

His-Chien Lin

A barrier layer stack. The barrier layer stack includes a semiconductor process wafer comprising an exposed conductive region, a first barrier layer stack comprising at least one TiN and one Ti layers overlying and contacting the conductive region, wherein the TiN layer is contacted with the Ti layer, and an overlying aluminum alloy layer in contact with the first barrier layer stack.

Barrier layer stack to prevent Ti diffusion

An improved barrier layer stack and method for forming the same for preserving an aluminum alloy interconnect resistivity, the method comprising providing a semiconductor process wafer comprising an exposed conductive region; forming a first barrier layer comprising a barrier layer stack over the exposed conductive region comprising one of a TiN or Ti layer in contact with the conductive region; forming at least one additional barrier layer comprising the barrier layer stack to form an alternating sequence of TiN and Ti layers; forming an uppermost barrier layer of TiN comprising the barrier layer stack; forming an overlying aluminum alloy region in contact with the uppermost barrier layer; and, subjecting the semiconductor process wafer to at least one process comprising a temperature of greater than temperatures greater than about 350&#xb0; C.

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Hsin-Chu, Taiwan

Chi-Lung Lin