3com Corporation

Hewlett-packard Company

Hewlett-packard Development Company, L.p.

Hewlett Packard Enterprise Development LP

Chi-Lie Wang

BaoDong Hu

Scott William Mitchell

Kap Soh

Li-Jau Yang

Nathan Henderson

Eric Roger Davis

Ngo Thanh Ho

Krishna Uppunda

Chin-Li Mou

Richard S Reid

Baranitharan Subbiah

Nathaniel H Henderson

Sudhakar Rao

Lomberto P Jimenez

Maria Hu

Alexander Herrera

Raymond Su

Sanjay Katabathuni

Shoby A Cherian

David R Brown

Glenn William Connery

William Paul Sherer

Lai-Chin Lo

Li-Jau (Steven) Yang

Chin-Li (Karen) Mou

Jeffrey Ross

A data processing system adapted for high-speed network communications, a method for managing a network interface and a network interface for such system, are provided, in to which processing of packets received over the network is achieved by embedded logic at the network interface level. Incoming packets on the network interface are parsed and classified as they are stored in a buffer memory. Functional logic coupled to the buffer memory on the network interface is enabled to access any data field within a packet in a single cycle, using pointers and packet classification information produced by the parsing and classifying step. Results of operations on the data fields in the packets are available before the packets are transferred out of the buffer memory. A data processing system, a method for management of a network interface and a network interface are also provided by the present invention that include an embedded firewall at the network interface level of the system, which protects against inside and outside attacks on the security of data processing system. Furthermore, a data processing system, a method for management of a network interface and a network interface are a provided by the present invention that support class of service management for packets incoming from the network, by applying priority rules at the network interface level of the system.

Computer system and network interface with hardware based packet filtering and classification

A data processing system adapted for high-speed network communications, a method for managing a network interface and a network interface for such system, are provided, in which processing of packets received over the network is achieved by embedded logic at the network interface level. Incoming packets on the network interface are parsed and classified as they are stored in a buffer memory. Functional logic coupled to the buffer memory on the network interface is enabled to access any data field within a packet in a single cycle, using pointers and packet classification information produced by the parsing and classifying step. Results of operations on the data fields in the packets are available before the packets are transferred out of the buffer memory. A data processing system, a method for management of a network interface and a network interface are also provided by the present invention that include an embedded firewall at the network interface level of the system, which protects against inside and outside attacks on the security of data processing system. Furthermore, a data processing system, a method for management of a network interface and a network interface are a provided by the present invention that support class of service management for packets incoming from the network, by applying priority rules at the network interface level of the system.

Computer system and network interface supporting class of service queues

A data processing system adapted for high-speed network communications, a method for managing a network interface and a network interface for such system, are provided, in which processing of packets received over the network is achieved by embedded logic at the network interface level. Incoming packets on the network interface are parsed and classified as they are stored in a buffer memory. Functional logic coupled to the buffer memory on the network interface is enabled to access any data field within a packet in a single cycle, using pointers and packet classification information produced by the parsing and classifying step. Results of operations on the data fields in the packets are available before the packets are transferred out of the buffer memory. A data processing system, a method for management of a network interface and a network interface are also provided by the present invention that include an embedded firewall at the network interface level of the system, which protects against inside and-outside attacks on the security of data processing system. Furthermore, a data processing system, a method for management of a network interface and a network interface are a provided by the present invention that support class of service management for packets incoming from the network, by applying priority rules at the network interface level of the system.

In one embodiment of a networking module, a first block receives a serial digital media signal, and provides a parallel digital media signal based on the serial digital media signal. A second block, operative with the first block, stores the parallel digital media signal in a corresponding slot in an outgoing frame, and sends the outgoing frame in response to receiving an incoming frame.

Method and apparatus for real-time transport of multi-media information in a network

A power management circuit for managing power of a network interface is provided. The network interface includes a medium interface unit coupled to a network media supporting at least a high speed protocol and a lower speed protocol. The power management logic includes logic to determine that an event signalling entry of the medium interface unit into the lower speed protocol has occurred; and logic to force the medium interface unit into the lower speed protocol in response to a determination that the event has occurred.

High speed network interface with automatic power management with auto-negotiation

A computer system comprises host processor and a network interface, wherein the host processor includes resources supporting a full power mode, a lower power mode and a power down mode, as seen in standard system bus specifications such as PCI and InfiniBand. The network interface includes a medium interface unit coupled to network media supporting a least high speed protocol, such as a Gigabit Ethernet or high-speed InfiniBand, and a lower speed protocol, such as one of 10 Mb and 100 Mb Ethernet or a lower speed InfiniBand. Power management circuitry forces the medium interface unit to the lower speed protocol in response to an event signaling entry of the lower power mode. In the lower power mode, the network interface consumes less than the specified power when executing the lower speed protocol, and consumes greater than the specified power when executing the high speed protocol. Logic in the network interface operates in the lower power mode, and uses the lower speed protocol to detect a pattern in incoming packets. In response to the detection of said pattern, the logic issues a reset signal to the host processor. Thus, the network interface operates as a wake-up device in the lower power mode, using the lower speed protocol.

Integrated circuit having a networking interface module supporting a plurality of protocols

Computer system and network interface with hardware based rule checking for embedded firewall

A plurality of virtual paths in a network interface between a host port and a network port are managed according to respective priorities using dynamic buffer allocation. Thus, multiple levels of quality of service are supported through a single physical network port. Variant processes are applied for handling packets which have been downloaded to a network interface, prior to transmission onto the network. The network interface also includes memory used as a transmit buffer, that stores data packets received from the host computer on the first port, and provides data to the second port for transmission on the network. A control circuit in the network interface manages the memory as a plurality of first-in-first-out FIFO queues having respective priorities. Logic places a packet received from the host processor into one of the plurality of FIFO queues according to a quality of service parameter associated with the packets. Logic transmits the packets in the plurality of FIFO queues according to respective priorities. Logic dynamically allocates the memory using a list of buffer descriptors for corresponding buffers in said memory. The list of buffer descriptors comprises a free buffer list and a used buffer list for each of the virtual paths served by the system. A used buffer descriptor is released from the used buffer list, after the data stored in the corresponding used buffer has been transmitted, to the free buffer list for a virtual path which has the largest amount traffic or which has the smallest number of free buffers in its free buffer list.

Network interface supporting of virtual paths for quality of service with dynamic buffer allocation

A network interface comprises the first port on which incoming data is transmitted and received at the data transfer rate of the network, a buffer memory coupled to the first port, and a second port coupled with the buffer memory, and through which transfer of packets between the host system, and the buffer memory is executed. A driver in the host system allocates a plurality of sets of receive buffers, where each set of receive buffers is composed of receive buffers having different sizes. A receive buffer descriptor cache located at the interface level stores receive buffer descriptors corresponding to receive buffers in the plurality of sets. As incoming packets arrive at the interface, logic determines the size of the incoming packet and assigns the packet to a receive buffer descriptor in the receive buffer descriptor cache according to the determined size. Upload logic at the interface level manages the uploading of packets from the buffer memory to the host system using the assigned receive buffer descriptors. A driver in the host dynamically adjusts the sizes of receive buffers in response to statistics about packet size.

Computer system and network interface supporting dynamically optimized receive buffer queues

A system which provides for generation of alert packets using network interfaces. The alert packets are downloaded into a network interface, for example during a transition from an OS-present state to an OS-absent state. The alert packets are provided with control fields which, in various combinations, indicate alert conditions upon which such packets are to be transmitted, and which indicate a repetition mode for transmission of the packet after a match of the alert condition. Logic in the network interface, causes scanning in the plurality of packets downloaded into the network interface at scan intervals to identify packets having control codes matching alert signals received by the network interface. The process allows for more than one alert packet to be matched with a single alert signal during a given scan interval, and to be transmitted. Also, in one embodiment, each alert packet which matches an alert signal can be transmitted according to a repetition mode indicated in the control fields of the packet.

System and method for alert generation using network interface

An architecture for a high performance IPSEC accelerator. The architecture includes components for scanning fields of packets, programming an IPSEC services device according to the scanned fields, and modifying the scanned packet with an output from the IPSEC security services device. Preferably, the architecture is implemented in hardware, and attached to a host machine. Hardware devices, fast in comparison to software processing and network speeds, allows the computationally intensive IPSEC processes to be completed in real-time and reduce or eliminate bottlenecks in the path of a packet being sent or received to/from a network.

High performance IPSEC hardware accelerator for packet classification

A plurality of virtual paths in a network interface between a host port and a network port are managed according to respective priorities. Thus, multiple levels of quality of service are supported through a single physical network port. Variant processes are applied for handling packets which have been downloaded to a network interface, prior to transmission onto the network. The network interface also includes memory used as a transmit buffer, that stores data packets received from the host computer on the first port, and provides data to the second port for transmission on the network. A control circuit in the network interface manages the memory as a plurality of first-in-first-out FIFO queues having respective priorities. Logic places a packet received from the host processor into one of the plurality of FIFO queues according to a quality of service parameter associated with the packets. Logic transmits the packets in the plurality of FIFO queues according to respective priorities. The transmit packet buffer may be statically or dynamically allocated memory.

Growing community of inventors

Fremont, CA, United States of America

Chi-Lie Wang