Synopsys, Inc.

Chi-Liang Yang

Yao-Jih Hung

Chia-Hsuan Cheng

A method for generating a circuit layout includes generating a plurality of symbols. Each of the plurality of symbols identifies one of multiple versions of code describing a circuit layout. The method also includes loading the plurality of symbols into a design platform used to compile the code describing the circuit layout. The design platform has evaluators for the multiple versions of the code. The method further includes generating the circuit layout described by the code using the design platform.

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Taichung, Taiwan

Chi-Liang Yang