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Hewlett-packard Company

Chi-Kwan Lau

Chen-Hsi Lin

Gregory N Burton

Donald L Packwood

Ashor Kapoor

The present invention provides a buried layer fabrication sequence suitable for bipolar and BiCMOS applications. The buried layer fabrication sequence for forming a buried layer having a first conductivity type includes the steps of: forming a first dielectric layer on a semiconductor substrate, the semiconductor substrate having a second conductivity type; forming a first mask layer having openings on top of the first dielectric layer, wherein the openings in the first mask layer are positioned over the regions where the first buried layer is formed; exposing the semiconductor substrate in the regions where openings in the first mask layer are formed; forming a second dielectric layer; removing the second dielectric layer; and forming a semiconductor layer.

Method for formation of a buried layer for a semiconductor device

A method of fabricating a BiCMOS device in which PMOS and NMOS transistors are formed prior to a base/emitter structure of a bipolar transistor. In forming the base/emitter structure, a blanket implant of a first impurity is introduced into a base region of a semiconductor substrate. An insulating layer is deposited and then patterned to expose a portion of the base region at an emitter window. A polysilicon layer is deposited on the insulating layer and into the emitter window. The polysilicon layer is patterned to provide the desired configuration at the emitter window, whereafter the remaining polysilicon acts as a mask for etching of the insulating layer. Thus, etching of the insulating layer is performed in a self-aligning manner. Self-alignment is also utilized in providing a base-link region and in providing a silicide layer.

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Saratoga, CA, United States of America

Chi-Kwan Lau