Mediatek Corporation

Winbond Electronics Corporation

Chi-Hui Wang

Chi-Cheng Ju

Te-Hao Chang

Ying-Jui Chen

Sheng-Jui Huang

Jen-Che Tsai

Yung-Yu Lin

Tzueng-Yau Lin

Yau-Wai Wong

Shang-Tzu Ju

Chun-Nan Li

Chih-Horng Weng

A processor or control circuit of an apparatus receives data of an image based on sensing by one or more image sensors. The processor or control circuit also detects a region of interest (ROI) in the image. The processor or control circuit then adaptively controls a light projector with respect to projecting light toward the ROI.

Method and apparatus of adaptive infrared projection control

A signal processing system and related method are disclosed. The signal processing system includes a signal processing module, powered by a low supply voltage, for processing signals; and an interface module, coupled to the signal processing module, powered by a high supply voltage, for outputting signals generated from the signal processing module; wherein the interface module comprises a plurality of high-voltage functional blocks integrated therein, and each of the functional blocks is configured to perform a predetermined interface functionality. In this way, the bill-of-material (BOM) cost can be reduced.

Signal processing system having a plurality of high-voltage functional blocks integrated into interface module and method thereof

A video decoder is provided. An analog-to-digital converter (ADC) converts an analog video signal into a plurality of samples at a sampling rate. A main processing path collects a plurality of odd samples to provide a first decoded video output and synchronization information. A plurality of even samples is converted into a plurality of first converted samples at a first predetermined frequency by a sample rate converter, and then filtered by a filter to obtain a second Y signal. A buffer stores the second Y signal, and reads the second Y signal in response to the timing information. An output sample rate converter converts the buffered output into a plurality of second converted samples at a second predetermined frequency. A parallel-to-serial converter receives the first decoded video output and the plurality of second converted samples to drive a second decoded video output.

Video decoder

A method of implementing on screen display (OSD) function and a device thereof are provided. The method includes the steps of storing the graphic data in a dynamic random access memory (DRAM), obtaining the displaying information and a sequence for the graphic data by an OSD decoder, and showing the graphic data by an address generator on a screen according to the displaying information and the displaying sequence. The device includes a dynamic random access memory (DRAM) for storing the graphic data, an OSD decoder for obtaining a sequence according to the stored graphic data, and an address generator electrically connected to the DRAM and the OSD decoder for showing the graphic data on a screen according to the sequence.

Method of implementing OSD function and device thereof

A synchronous decoding method for AV packets that solves the problem of asynchronous AV signals resulting from the decoding restoration of an AV packet-type bitstream. No large PTS memory is needed as an index table for a video buffer with the method. One PTS value is sampled and recorded at one time. The old PTS value is replaced in the next sampling. The rest of the unrecorded PTS data are estimated using the frame rate and the previous PTS value. This method not only simplifies the structure but also provides a smoother playing effect for an AV source with a higher error rate, rendering better noise tolerance.

Synchronous decoding method for AV packets

A compressing/decompressing apparatus comprising a receiver, a memory interface, a compressor and a decompressor is disclosed. The receiver receives a video graphics signal comprising a plurality of video graphics packets, each comprising a plurality of pixels. The memory interface is coupled between the frame buffer memory and the compressing and decompressing device as a data transfer interface. The compressor sequentially receives a video graphics packet of the video graphics signal, truncates a predetermined length of LSBs of each pixel in the video graphics packet to form a compressed video graphics signal comprising of a plurality of compressed video graphics packets, and stores the compressed video graphics signal in a frame buffer memory. The decompressor sequentially receives a compressed video graphics packet of the compressed video graphics signal, recovers each pixel of the compressed video graphics packet with an adjusted value of the predetermined length to form a decompressed video graphics signal comprising of a plurality of decompressed video graphics packets.

Growing community of inventors

Hsinchu, Taiwan

Chi-Hui Wang