Mediatek Corporation

Mediatek Singapore Pte. Ltd.

Chi-Hsueh Wang

Robert Bogdan Staszewski

Hsiang-Hui Chang

Yang-Chuan Chen

Chun-Ming Kuo

Bo-Yu Lin

Kai-Peng Kao

Khurram Muhammad

Hsin-Hung Chen

Yi-Hsien Cho

Shih-Chi Shen

Tai-Yuan Yu

Li-Shin Lai

Ying-Ying Chen

Chih-Ming Hung

Ping-Ying Wang

Ang-Sheng Lin

Bing Xu

Ming-Yu Hsieh

Wen-Chieh Wang

Chun-Geik Tan

Shao-Wei Feng

Chieh-Hsun Hsiao

I-Wen Liu

Pou-Chi Chang

Wei-Min Shu

The invention provides method and associated signal system improving mitigation of injection-pulling effect for an oscillator which generates an output clock under control of a control signal. The method may include: by a loop filter, filtering a deviation signal to form a filtered signal; by a SIL (self-injection locked) controller, forming an auxiliary signal which tracks the deviation signal or a phase difference between a reference clock and an output signal resulting from the output clock; and, forming the control signal by summing the filtered signal and the auxiliary signal.

Method and associated signal system improving mitigation of injection-pulling effect

A frequency-generating circuit includes a frequency synthesizer circuit and a controller. The frequency synthesizer circuit generates a radio-frequency clock signal according to a reference clock signal and a channel number. The controller is coupled to the frequency synthesizer circuit, generates a power-down control signal for controlling at least a portion of the frequency synthesizer circuit to power down. The frequency synthesizer circuit includes an accumulator for generating an accumulated value according to the channel number. The frequency synthesizer circuit generates the radio-frequency clock signal according to the reference clock signal and the accumulated value. The controller maintains the accumulated value of the accumulator when the portion of the frequency synthesizer circuit powers down.

Methods for controlling a frequency synthesizer circuit and a frequency-generating circuit utilizing the same

A digital signal up-converting apparatus includes: a clock generating circuit arranged to generate a reference clock signal; an adjusting circuit coupled to the clock generating circuit and arranged to generate a first clock signal and a second clock signal according to the reference clock signal; a baseband circuit coupled to the adjusting circuit for receiving the first clock signal, wherein the baseband circuit further generates a digital output signal according to the first clock signal; and a sampling circuit coupled to the adjusting circuit and the baseband circuit for receiving the second clock signal and the digital output signal, wherein the second clock signal and the digital output signal are non-overlapping; wherein the sampling circuit samples the digital output signal based on the second clock signal and then combines the sampled digital output signal in order to generate a combined digital signal.

Digital signal up-converting apparatus and related digital signal up-converting method

A transmit power measurement apparatus includes a transmit power detection path, a compensation circuit and a tracking circuit. The compensation circuit includes a programmable filter device and a compensation controller. The programmable filter device generates a filter output. The compensation controller sets the programmable filter device at least based on a frequency response of the transmit power detection path. The tracking circuit generates a transmit power tracking result at least based on the filter output.

Transmit power measurement apparatus having programmable filter device that is set at least based on frequency response of transmit power detection path and related transmit power measurement method thereof

A method of estimating gain of a time-to-digital converter (TDC) includes: capturing a TDC output sample; calculating a gradient in response to the TDC output sample; and adjusting a TDC normalizing gain based on the calculating step. Another method of calibrating gain of a TDC includes: capturing a phase error which is derived from a TDC output sample, a reference phase and a variable phase; calculating a gradient in response to the phase error; and adjusting a TDC normalizing gain based on the calculating step.

Method and apparatus of estimating/calibrating TDC gain

A digital transmitter includes: a plurality of adjustable delay lines arranged to delay a plurality of digital input signals by a plurality of delay times to generate a plurality of delayed digital input signals respectively; a plurality of converting devices arranged to convert the plurality of delayed digital input signals into a plurality of converting signals respectively; and a calibration device arranged to adjust a delay time of at least one adjustable delay line in the plurality of adjustable delay lines to make the plurality of converting devices convert the plurality of delayed digital input signals at respective desire time points.

Digital transmitter and method for calibrating digital transmitter

A digital transmitter includes: a plurality of converting devices arranged to generate a plurality of converting signals according to a plurality of digital input signals; a compensation device arranged to generate at least one compensation signal according to the plurality of digital input signals; and a combining circuit arranged to output an amplified output signal according to the plurality of converting signals and the at least one compensation signal.

Digital transmitter and method for compensating mismatch in digital transmitter

A transmitter system includes a digital phase rotator, a phase rotation controller, and a digital radio-frequency (RF) transmitter. The digital phase rotator receives a first constellation data, and applies a digital phase rotation to the received first constellation data to generate a second constellation data. The phase rotation controller configures the digital phase rotation. The digital RF transmitter receives a digital input data derived from the second constellation data, and converts the digital input data into an analog RF output.

Transmitter system with digital phase rotator used for applying digital phase rotation to constellation data and related signal transmission method thereof

A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.

Frequency modulator having digitally-controlled oscillator with modulation tuning and phase-locked loop tuning

A frequency modulating path for generating a frequency modulated clock includes a direct feed input arranged for directly modulating frequency of an oscillator, and a compensating feed input arranged for compensating effects of frequency modulating on a phase error; wherein the compensating feed input is resampled by a down-divided clock that is an integer edge division of the oscillator. A reference phase generator for generating a reference phase output includes a resampling circuit, an accumulator and a sampler. The resampling circuit is for resampling a modulating frequency command word (FCW) input to produce a plurality of samples. The accumulator is for accumulating the samples to generate an accumulated result. The sampler is for sampling the accumulated result according to a frequency reference clock, and accordingly generating a sampled result, wherein the reference phase output is updated according to at least the sampled result.

Polar transmitter having frequency modulating path with interpolation in compensating feed input and related method thereof

A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one resistance-capacitance (RC) detection result, wherein the digital compensation filter includes an RC compensation module; and tuning the digital compensation filter by inputting the RC detection result into the RC compensation module. For example, the RC detection result may correspond to a detected value representing a product of a resistance value and a capacitance value. In another example, the at least one RC detection result may be obtained by performing RC detection on at least a portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein. An associated digital compensation filter and an associated calibration circuit are also provided.

Method for tuning a digital compensation filter within a transmitter, and associated digital compensation filter

An exemplary calibration apparatus for calibrating timing mismatch of an edge rotator operating on multiple phases of an oscillator includes a capturing block arranged to capture phase error samples, and a calibrating block arranged to adjust timing of said edge rotator according to said phase error samples. An exemplary calibration method for calibrating timing mismatch of an edge rotator operating on multiple phases of an oscillator includes the following steps: capturing phase error samples, and adjusting timing of said edge rotator according to said phase error samples.

Apparatus and method for calibrating timing mismatch of edge rotator operating on multiple phases of oscillator

A polar transmitter includes a frequency modulating path, a clock divider and a digital processing block. The frequency modulating path is arranged for generating a frequency modulated clock in response to a frequency modulating signal. The clock divider is coupled to the frequency modulated clock, and arranged for generating a down-divided clock. The digital processing block is coupled to the down-divided clock, and arranged for generating the frequency modulating signal, wherein the frequency modulating signal is adjusted for frequency deviation of the frequency modulated clock. A method for polar transmission includes: generating a frequency modulated clock in response to a frequency modulating signal; dividing a frequency of said frequency modulated clock to generate a down-divided clock; and generating said frequency modulating signal according to said down-divided clock, wherein said frequency modulating signal is adjusted for frequency deviation of said frequency modulated clock.

Polar transmitter having digital processing block used for adjusting frequency modulating signal for frequency deviation of frequency modulated clock and related method thereof

Growing community of inventors

Kaohsiung, Taiwan

Chi-Hsueh Wang