Realtek Semiconductor Inc.

Sunplus Technology Co., Ltd.

Chi-Hsi Su

Liang-Wei Huang

Yun-Tse Chen

Hsuan-ting Ho

Kai-Yue Lin

Po-Han Lin

Wei Sheng Chang

The present invention discloses a DAC method having signal calibration mechanism used in a DAC circuit having thermometer-controlled current sources generating an output analog signal according to a total current thereof and a control circuit. Current offset values of the current sources are retrieved. The current offset values are sorted to generate a turn-on order, in which the current offset values are separated into current offset groups according to the turn-on order, the signs of each neighboring two groups being opposite such that the current offset values cancel each other when the current sources turn on according to the turn-on order to keep an absolute value of a total offset not larger than a half of a largest absolute value of the current offset values. The current sources are turned on based on the turn-on order according to a thermal code included in an input digital signal.

Digital-to-analog conversion circuit and method having signal calibration mechanism

A signal processing device includes a decision feedback equalizer and a coefficient adjusting circuit. The decision feedback equalizer includes a first equalizer configured to perform filtering on a first signal according to a set of first coefficients to generate a first filtered signal. The set of first coefficients includes multiple first coefficients. The coefficient adjusting circuit is configured to adaptively adjust one or more of the first coefficients according to an error signal. A limit operation of the first coefficients is selectively performed. When the limit operation of the first coefficients is performed, at least one of the first coefficients is set to a first predetermined value to generate a set of limited first coefficients.

Signal processing devices and signal processing methods

A signal processing circuit, which includes: a first clock source, configured to generate a first clock signal; a phase adjusting circuit, configured to receive the first clock signal, and to generate a second clock signal and a third clock signal, wherein the second clock signal and the third clock signal have different phases; an error compensating circuit, configured to compensate an input signal according to an error signal, to generate an compensated input signal; an error calculating circuit, configured to generate the error signal according to the first clock signal, the third clock signal and the compensated input signal; and a receiving end ADC (Analog to Digital Converter), configured to sample the compensated input signal according to the second clock signal.

Signal processing circuit and signal processing method

A Radio Frequency Interference (RFI) estimation device for generating an estimated RFI signal includes a combiner, a first multiplier and a second multiplier. The combiner is configured to combine a first digital signal and a second signal to generate the estimated RFI signal. The first multiplier is configured to generate the first digital signal according to an in-phase signal and a first cosine signal. The second multiplier is configured to generate the second digital signal according to a quadrature-phase signal and a first sine signal. The first cosine signal and the first sine signal are generated based on a frequency and the in-phase signal and the quadrature-phase signal are generated based on the frequency and one or more harmonics of the frequency.

RFI estimation device, signal processing device and signal processing method

A wireless receiver system with automatic gain control, which includes a receiving path, an analog to digital converter, an automatic gain control (AGC) device and a controller. The controller has an adjacent channel interference off mode, an adjacent channel interference acquisition mode and an adjacent channel interference tracking mode to accordingly set the AGC device for adjusting the gains of a plurality of modules of the receiving path. Namely, the strengths of different adjacent channel interferences are appropriately adjusted to thereby obtain the best received signal quality.

Wireless receiver system and method with automatic gain control

An apparatus and method for adaptively correcting I/Q imbalance, which is used in a receiver for correcting a received I/Q imbalanced signal to thus eliminate the I/Q imbalance. First, an interference amount caused by interference from an imbalanced in-phase signal to an imbalanced quadrature-phase signal is computed and accordingly subtracted from the quadrature-phase signal, so that a corrected quadrature-phase signal without phase imbalance is obtained. Next, a power of output in-phase signal, a power of output quadrature-phase signal, and a target are compared to thus determine an in-phase scaling factor and a quadrature-phase scaling factor. Finally, the imbalanced in-phase signal is multiplied by the in-phase scaling factor to thus obtain the output in-phase signal, and the corrected quadrature-phase signal is multiplied by the quadrature-phase scaling factor to thus obtain the output quadrature-phase signal.

Growing community of inventors

Hsinchu, Taiwan

Chi-Hsi Su