Electronics and Telecommunications Research Institute

Chi Hoon Jun

Sang Choon Ko

Chang Auck Choi

Youn Tae Kim

Myung Lae Lee

Yun Tae Kim

Young Rak Park

Dong Yun Jung

Chang Kyu Kim

Eun Soo Nam

Moon Youn Jung

Hyung Seok Lee

Jeho Na

Hyun-Gyu Jang

Woojin Chang

Seok-Hwan Moon

Jae Kyoung Mun

Minki Kim

Sung-Bum Bae

Jong Tae Baek

Junbo Park

Hyun Soo Lee

Je Ho Na

Byoung Gon Yu

Ho Jun Ryu

Jong Tae Moon

Hae Sik Yang

Dong Ho Shin

Ki Hwan Kim

Seon Hee Park

Kwang-Seong Choi

Chang Han Je

Se Ho Park

Dae Sik Lee

Won Ick Jang

Woo-Young Jang

Hyeon Bong Pyo

Myungjoon Kwack

Sung Sik Lee

Chang-Kyu Kim

Jong-Moon Park

Zin-Sig Kim

Jeong-Jin Kim

Jong Soo Ko

Young Shin Kim

Doo Young Hah

Hyungyu Jang

Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.

High voltage bridge rectifier

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Semiconductor device and method of fabricating the same

A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.

Semiconductor device with passivation layer for control of leakage current

Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure. The first electrode structural body includes a first electrode, a second electrode, and a third electrode, which are arranged in a clockwise direction, the second electrode structural body includes a fourth electrode, a fifth electrode, and a sixth electrode, which are arranged in a clockwise direction, the first electrode and the sixth electrode, which are connected to each other, are connected to an external circuit, the third electrode and the fourth electrode, which are connected to each other, are connected to an external circuit, and each of the second electrode and the fifth electrode is connected to the external circuit.

Bridge diode

Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.

Hybrid diode device

Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.

Electronical device

Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.

Power semiconductor module and method for stabilizing thereof

Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.

Semiconductor device

A piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.

Method of manufacturing a piezoelectric micro energy harvester

Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.

Methods of manufacturing nitride semiconductor devices

The present inventive concept discloses an impact-type piezoelectric micro power generator. The impact-type piezoelectric micro power generator may comprise a base having a cavity and at least one stop area adjacent to the cavity; a frame fastened to the base; a vibrating body comprising a plurality of first vibrating beams extended from the frame toward a top of the cavity, an impact beam connected to between first tips of the plurality of first vibrating beams and extended onto the stop area, and a second vibrating beam extended from the impact beam to between the plurality of first vibrating beams, the second vibrating beam having a second tip; and a piezoelectric device disposed on one of a top and a bottom of the second vibrating beam and the impact beam, the piezoelectric device generating electric power according to impacts of the vibrating body to the stop area and bending of the impact beam and the second vibrating beam.

Impact-type piezoelectric micro power generator

Disclosed are a slim self-powering power supplier using a flexible PCB for a wireless sensor network and a sensor node using the same, and a fabrication method thereof. An exemplary embodiment of the present disclosure provides a self-powering power supplier including: a flexible PCB; a lower electrode positioned on the flexible PCB; a piezoelectric body having a cantilever structure deposited on the lower electrode; and an upper electrode formed on the piezoelectric body.

Power supplier using flexible PCB based on self-powering and sensor node using the same

Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.

Piezoelectric micro energy harvester and manufacturing method thereof

A method of manufacturing a tunable wavelength optical filter. The method includes steps of forming a first sacrificial oxide film for floating a lower mirror on a semiconductor substrate; sequentially laminating conductive silicon films and oxide films for defining a mirror region on the first sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form a lower mirror; sequentially laminating conductive silicon films and oxide films for defining the mirror region on a second sacrificial oxide film in a multi-layer and laminating another conductive silicon film to form an upper mirror and forming an optical tuning space between the lower mirror and the upper mirror and etching the first sacrificial oxide film and the second sacrificial oxide film such that the lower mirror is floated on the semiconductor substrate.

Tunable-wavelength optical filter and method of manufacturing the same

Growing community of inventors

Daejeon, South Korea

Chi Hoon Jun