National Yang Ming Chiao Tung University

Phison Electronics Corporation

Chi-Heng Yang

Hsie-Chia Chang

Yi-Min Lin

Wei Hung Lin

Chen-Yi Lee

Yu-Cheng Hsu

Kuo-Hsin Lai

Tien-Ching Wang

Chia-Ching Chu

A data programming method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first data and programming the first data into a first lower physical programming unit; receiving second data; in response to the second data to be programmed into a first upper physical programming unit corresponding to the first lower physical programming unit, performing a first data obtaining operation which does not include reading the first lower physical programming unit by using a default read voltage; and programming the second data into the first upper physical programming unit according to the third data obtained through the first data obtaining operation.

Data programming method, memory storage device and memory control circuit unit

A memory system, a fully parallel encoding method, and a fully parallel decoding method are disclosed. The encoding method utilizes a plurality of minimal polynomials that constitute a generator polynomial to derive a plurality of roots from the minimal polynomials. A first encoding matrix derived according to the roots of the minimal polynomials is subsequently decomposed to derive a second encoding matrix, in which partial elements of the second encoding matrix are common in those of a parity check matrix of the decoder, such that the encoder and the decoder can efficiently share the same hardware. In addition, the decoding method defines a new error locator polynomial and utilizes a cubic matrix operation to respectively combine the equations, which reduces the hardware required by the fully parallel architecture.

Fully parallel encoding method and fully parallel decoding method of memory system

An apparatus of processing polynomials includes at least one reconfigurable module and an encoder controller. The reconfigurable module includes a plurality of linear feedback shift registers. The encoder controller can control the reconfigurable module to factor a generator polynomial into a factorial polynomial. In the reconfigurable module, the linear feedback shift registers can register a plurality of factors of the factorial polynomial respectively.

Apparatus and method of processing polynomials

Growing community of inventors

Taipei, Taiwan

Chi-Heng Yang