Mediatek Corporation

Chi-Hao Hong

Shu-Lin Lai

Yi-Ping Kuo

Jiann-Tseng Huang

Dao-Ping Wang

Yi-Te Chiu

Che-Wei Chou

Yi-Wei Chen

Jia-Jing Chen

Chi-Kai Hsieh

Ya-Ting Yang

A memory with built-in synchronous-write-through (SWT) redundancy includes a plurality of memory input/output (IO) arrays, a plurality of SWT circuits, and at least one spare SWT circuit. The at least one spare SWT circuit is used to replace at least one of the plurality of SWT circuits that is defective.

Memory with built-in synchronous-write-through redundancy and associated test method

A pre-processing circuit is used for pre-processing a data-line voltage representative of a data output of a memory device. The pre-processing circuit includes a pre-charging circuit and a clamping circuit. The pre-charging circuit pre-charges a data line to adjust the data-line voltage at the data line that is coupled to the memory device. The clamping circuit clamps the data-line voltage to generate a clamped data-line voltage when the data-line voltage is pre-charged to a level that enables a clamping function of the clamping circuit, wherein the clamped data-line voltage is lower than a supply voltage of the pre-processing circuit. The clamping circuit includes a feedback circuit that feeds back a control voltage according to the data-line voltage at the data line, and further reduces its direct current (DC) leakage when the data-line voltage is clamped, wherein the clamping function of the clamping circuit is controlled by the control voltage.

Pre-processing circuit with data-line DC immune clamping and associated method and sensing circuit

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Changhua County, Taiwan

Chi-Hao Hong