Advanced Semiconductor Engineering, Inc.

Chi-Hao Chiu

Chien Cheng Liu

Meng-Jen Wang

Hsueh-Te Wang

Yu-Wen Chen

Chi-Ta Chuang

Chih-Ming Chung

Tai-Yuan Huang

Chih-Min Pao

Chi-Sheng Chao

A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer connecting regions at the fan-out ends of the leads. A plurality of indentations are formed at the upper surfaces of the leads and adjacent to the corresponding bump-bonding regions so as to avoid solder contamination on the leads. After molding, the indentations are filled with the molding compound. Preferably, the indentations have a reversed '&#x3a9;'-shaped profile to prevent bumps of the flip chip from excessively wetting over the other portions of the leads to firmly fix the fan-in ends of the leads.

Semiconductor package with a flip chip on a solder-resist leadframe

A flip chip package structure and manufacturing method thereof is provided. A chip is electrically connected to a substrate. A heat sink is attached to the backside of the chip. The heat sink has at least a through hole located at a peripheral region and laterally adjacent to the chip. A dispensing process is carried out to deliver an underfill material via the through hole such that the space between the chip and the substrate is filled. The underfill material also extends to cover a portion of the heat sink so that the heat sink and the substrate are connected together. The underfill material is cured to fix the heat sink, the substrate and the chip in position.

Flip chip package and manufacturing method thereof

A quad flat flip chip package and a leadframe therefor are provided. A bump connection part is defined by bending or etching the leads of the leadframe. Thus, the bump formed after a reflow process is limited within the bump connection part, and the collapse of the bump can be prevented. Moreover, and the manufacturing costs of the package can be decreased and the process thereof can be simplified.

Quad flat flip chip package and leadframe thereof

A flip-chip type quad flat package and a leadframe. The leadframe comprises a bump-connecting area and a non-connecting area. The maximum width of the bump-connecting area is larger than the width of the non-connecting area. A bump is limited to the bump-connecting area after performing a reflow process so that the bumps are prevented from collapsing, the manufacturing cost is reduced and the process is simplified.

Flip-chip type quad flat package and leadframe

A quad flat flip chip packaging process and a leadframe therefor are provided. A sacrificial film is attached on the leads of the leadframe for limiting the extent of bumps when formed and saving the manufacturing cost. Besides, the sacrificial film can be removed from the leadframe after a reflow step. Thus, the delamination between the molding compound material and the leads can be prevented during the molding step.

Quad flat flip chip packaging process and leadframe therefor

A package structure with a heat spreader and manufacturing method thereof is disclosed. The package structure includes a substrate, a ground pad, a heat spreader, a non-conductive adhesive layer, and a pre-solder layer. A die is seated on the substrate, and the ground pad is disposed on the surface of the substrate. The manufacturing method of the package structure includes the following steps: (a) providing the substrate; (b) forming the pre-solder layer on the ground pad by solder paste printing; (c) forming the non-conductive adhesive layer on the substrate surface for being adjacent to the pre-solder layer by adhesive dispensing; (d) disposing the heat spreader onto the non-conductive layer and the pre-solder layer; and (e) heating the non-conductive adhesive layer for solidification and continuing to heat the pre-solder layer for solder reflow so that the heat spreader is adhered to the substrate via the non-conductive adhesive layer and coupled to the ground pad via the pre-solder layer.

Package structure with a heat spreader and manufacturing method thereof

A manufacturing method of a flip chip package mainly comprises the following steps. Initially, a chip having an active surface with a plurality of bumps formed thereon is provided. Next, the active surface of the chip is faced to and disposed on an upper surface of a substrate. In such manner, the chip will be electrically connected to the substrate and a gap between the chip and the substrate will be formed. Afterwards, an underfill is filled in the gap and then a first curing process is performed to have the underfill partially hardened to have the underfill transformed into a partially hardened underfill. Finally, the combination of the chip, the substrate and the partially hardened underfill is flipped over to have the substrate located above the chip, then a second curing process is performed to have the partially hardened underfill into a fully hardened underfill, and then flipping over the combination of the chip, the substrate and the fully hardened underfill.

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Pingtung, Taiwan

Chi-Hao Chiu