Astera Labs, Inc.

Asiera Labs, Inc.

Chi Feng

Enrique Musoll

Subbarao Arumilli

Jitendra Mohan

Pulkit Khandelwal

Casey Morrison

Ken (Keqin) Han

Vivek Trivedi

Vikas Khandelwal

Charan Enugala

Anh T Tran

A memory control component encodes over-capacity data into an error correction code generated for and stored in association with an application data block, inferentially recovering the over-capacity data during application data block read-back by comparing error syndromes generated in detection/correction operations for respective combinations of each possible value of the over-capacity data and the read-back application data block.

Capacity-expanding memory control component

A low-latency signaling link retimer generates an output signal transmission synchronously with respect to a core clock signal alternately selected from two or more plesiochronous or mesochronous clock sources with switchover between or among the core-clock sources executed without shrinking, extending or otherwise disrupting the edge-to-edge core clock period or clock duty cycle.

Low-latency retimer with seamless clock switchover

A signaling-link retimer concatenates discontiguous leading and trailing portions of a precoded and scrambled symbol stream, shunting the trailing portion of the stream ahead of unneeded stream content to dynamically reduce the number of symbols queued between retimer input and output and thus reduce retimer transit latency.

Low-latency signaling-link retimer

A decoding engine within an integrated-circuit (IC) component iteratively executes error detection/correction operations with respect to a sequence of input data volumes to generate a corresponding sequence of error syndrome values, the input data volumes each including a first block of data and corresponding error correction code retrieved from one or more external memory components together with a respective one of a plurality of q-bit data patterns. Selector circuitry within the decoding engine selects one of the plurality of q-bit data patterns to be an output q-bit value according to error-count differentiation indicated by the error syndrome values.

Groups of signal conductors within a configurable communication system are managed by respective, dedicated media controllers implement a configurable number of independent communication channels through coordinated action so that signal conductors need not be multiplexed to/from multiple controllers and no media controllers or input/output driver circuits therein need be disabled in any configuration.

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San Jose, CA, United States of America

Chi Feng