National Semiconductor Corporation

Chetan Paydenkar

Anindya Poddar

Kevin C Weaver

In one aspect, an improved wafer mount tape is provided. The wafer mount tape includes a base layer, a release layer that expands when activated and a B-stageable adhesive layer that is positioned over the release layer. In a method aspect of the invention, a wafer level method of placing an adhesive layer on the back surface of integrated circuit devices is described. In this aspect, a wafer is secured to the mount tape. The wafer is diced while the wafer is attached to the mounting tape. After the wafer has been diced and any other desired wafer level processing is completed, the dice may be released individually or in groups by heating (or otherwise activating) localized areas of the tape under selected die to a temperature sufficient to release the selected die. The expansion of the release layer during the release operation serves to lift the selected die relative to adjacent die thereby facilitating picking. The B-stageable adhesive layer remains secured to the back surface of the die and therefore may be used to attach the respective dice to associated support structures.

Thermal release wafer mount tape with B-stage adhesive

In a stacked die integrated circuit structure, the structure can subsequently be tested by removing any packaging material and separating the die from a die paddle and from each other. The separation can involve the use of chemicals or heat, with or without the use of mechanical force. One aspect of the invention includes making use of specifically chosen adhesives to secure the die to the die paddle and to each other, so that any subsequent removal can readily be achieved.

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Mountain View, CA, United States of America

Chetan Paydenkar