Samsung Electronics Co., Ltd.

Korea Advanced Institute of Science and Technology

Cheon An Lee

Donghun Kwak

Youngsu Moon

Hyunseung Lee

Tammy Lee

Donghyun Kim

Sungho Kang

Iljun Ahn

Jaeyeon Park

Yongsup Park

Yunjae Lim

Taegyoung Ahn

Hyungdal Kwon

Ji-Young Lee

Yoon-Hee Choi

Mu-Hui Park

Ingyu Baek

Jae Seok Choi

Doogon Kim

Suna Kim

Dae Han Kim

Yongwoo Kim

Jiho Cho

Ho-Chul Lee

Jong Pil Son

MunChurl Kim

Seong Jin Jang

Young Taek Yoo

Pung Hwan Lim

Sang Joon Hwang

An image processing apparatus applies an image to a first learning network model to optimize the edges of the image, applies the image to a second learning network model to optimize the texture of the image, and applies a first weight to the first image and a second weight to the second image based on information on the edge areas and the texture areas of the image to acquire an output image.

Image processing apparatus and image processing method thereof

The disclosure relates to an artificial intelligence (AI) system that simulates functions such as cognition and judgment of the human brain by utilizing machine learning algorithms such as deep learning and its applications. In particular, the disclosure provides a method of controlling data input and output of a fully connected network according to an artificial intelligence system and its applications, the method including receiving, from a learning circuit, an edge sequence representing a connection relationship between nodes included in a current layer of the fully connected network, generating a compressed edge sequence that compresses consecutive invalid bits among bit strings constituting the edge sequence into one bit and a validity determination sequence determining valid and invalid bits among the bit strings constituting the compressed edge sequence, writing the compressed edge sequence and the validity determination sequence to the memory, and sequentially reading the compressed edge sequences from the memory based on the validity determination sequence such that the valid bits are sequentially output to the learning circuit.

Method and device for controlling data input and output of fully connected network

An electronic device and a control method therefor are disclosed. A method for controlling an electronic device according to the present invention comprises the steps of: receiving a current frame; determining a region, within the current frame, where there is a movement, on the basis of a prior frame and the current frame; inputting the current frame into an artificial intelligence learning model on the basis of the region where there is the movement, to obtain information relating to at least one object included in the current frame; and determining the object included in the region where there is the movement, by using the obtained information relating to the at least one object. Therefore, electronic device can rapidly determine an object included in a frame configuring a captured image.

Electronic device and control method therefor

An image processing apparatus obtains a first output image by applying an image to a first training network model, obtains a second output image by applying the image to a second training network model, and obtains a reconstructed image based on the first output image and the second output image. The first training network model is a model that uses a fixed parameter obtained through training of a plurality of sample images, the second training network model is trained to minimize a difference between a target image corresponding to the image and the reconstructed image.

A method of operating a nonvolatile memory device is provided as follows. The nonvolatile memory device includes memory blocks each of which has word lines. A setup voltage is applied to the word lines. A word line voltage is applied to a first word line selected from the word lines. Recovery voltages are applied to the word lines. Each recovery voltage is applied to at least one corresponding word line of the word lines. The recovery voltages have different voltage levels from each other.

Operation method operating nonvolatile memory device having plurality of memory blocks

A method of operating a variable resistance memory device comprises determining a level of an access voltage based on a number of rows or columns of a cell array, and supplying the access voltage having the determined level to the cell array.

Variable resistance memory device and related method of operation

A three-dimensional nonvolatile memory device comprises a plurality of cell strings arranged perpendicular to a substrate. The nonvolatile memory device is programmed by identifying a selected word line and a plurality of unselected word lines connected to at least one of the cell stings, and sequentially applying a negative voltage and a pass voltage to the selected and unselected word lines, and then applying a program voltage to the selected word line while continuing to apply the pass voltage to the unselected word lines.

Nonvolatile memory device and related method of programming

A resistive memory device includes a resistive memory cell, and a read/program circuit configured to program the resistive memory cell from a first state to a second state. The read/program circuit reads a resistance in the first state of the resistive memory cell and adjusts a compliance current supplied to the resistive memory cell according to the read resistance during the program operation.

Resistive memory device and related method of operation

A variable resistance memory device comprises a variable resistance memory cells and a read/write circuit configured to provide a program voltage to the variable resistance memory cell, and further configured to adjust a compliance current flowing through the variable resistance memory cell in successive loops of a program operation.

A high voltage generating circuit includes first and second high voltage pump circuits and an oscillator. The oscillator is configured to output a first clock signal driving the first high voltage pump circuit and a second clock signal driving the second high voltage pump circuit. The oscillator includes a first delay circuit configured to output the second clock signal by delaying the first clock signal by a first delay time. The first delay circuit is configured to adjust the first delay time according to a period of the first clock signal.

High voltage generating circuit and method of operating the same

A method for recording a digital broadcast, and a digital broadcast recording using the method, includes: recording start location data of a plurality of programs recorded during a recording mode of the digital broadcast; and indicating start locations of the individual programs using the start location data during an edition mode of the recorded digital broadcast.

Digital broadcast recorder and method for recording digital broadcast

A bit line pre-charge circuit for a dynamic random access memory (DRAM) uses a charge sharing scheme. The pre-charge circuit includes switching elements disposed between a power voltage node and an output node, capacitors connected between intermediate nodes and ground. The switching elements being operated by successively activated control signals to effectively charge a bit line pair to one half a power voltage using charge sharing between the capacitors.

Circuit precharging DRAM bit line

A title record method to be used with a digital broadcast recorder including recording a received digital broadcast signal, and, substantially simultaneously, reading broadcast information contained in the digital broadcast signal, determining the presence or absence of a program title in the broadcast information, continuously reading the broadcast information of the next digital broadcast signal following the digital broadcast signal if no title is present in the broadcast information, and, substantially simultaneously, determining the presence or absence of the title in the next digital broadcast signal, and recording the title as a title of the recorded broadcast signal if the title is present in the broadcast information.

Growing community of inventors

Hwaseong-si, South Korea

Cheon An Lee