Samsung Electronics Co., Ltd.

Cheol-woo Lee

Tae-sung Kim

Ji-Han Ko

Seung-hyun Baik

Su-han Park

Wan-ho Park

Geon-ho Cho

A semiconductor package including a package base substrate; at least one semiconductor chip on the package base substrate; a heat sink attached on the at least one semiconductor chip, the heat sink including a base and a plurality of protrusion patterns on a top of the base; and a molding covering a top of the package base substrate, a side surface of the at least one semiconductor chip, and a side surface of the heat sink without covering a top of the heat sink.

Semiconductor package including heat sink

A printed circuit board (PCB) for reducing a size of a semiconductor package and a semiconductor package including the same are provided. The PCB includes a substrate base including a chip attach area disposed on a top thereof, a top pad and a bottom pad respectively disposed on the top and a bottom of the substrate base, a first top solder resist layer formed on the top of the substrate base and including a first pad opening corresponding to the top pad and covering the chip attach area, a second top solder resist layer formed on the first top solder resist layer and including a second pad opening corresponding to the top pad and a chip attach opening corresponding to the chip attach area, and a bottom solder resist layer formed on the bottom of the substrate base and including a third pad opening corresponding to the bottom pad.

Printed circuit boards and semiconductor packages including the same

Provided is a semiconductor package that may prevent deformation of stacked semiconductor chips and minimize a semiconductor package size. The semiconductor package includes a package base substrate, a lower chip stacked on the package base substrate, an upper chip stacked on the lower chip, and a first die attach film (DAF) attached to a bottom surface of the upper chip to cover at least a portion of the lower chip. The first DAF may be a multi-layer film including a first attaching layer contacting the bottom surface of the upper chip and a second attaching layer attached to a bottom of the first attaching layer to cover at least a portion of a side surface of the lower chip.

Semiconductor package

Disclosed are a method and a device for correcting a track deviation by the deviation of a disc through a fine seek operation that operates a tracking actuator in a coarse seek stage of an optical disc drive wherein a track cross signal of the disc is detected in the optical pick up during the course seek operation and at the same time by using an optical encoder and a linear scale which are installed separately, a scale cross signal of the linear scale is detected and the actuator is driven by a signal resulting from comparing both the signals. At the stage of the travel of the optical pick up, the track deviation of the disk is corrected, and accordingly the relative speed between the light spot and the track at a seek direction becomes small to facilitate the control of the actuator and not to be necessary for lowering a speed of the VCM used in the coarse seek in order to lower the relative speed. The seek time is shortened so that the position control time between the coarse seek and the fine seek is close to zero.

Growing community of inventors

Gwangmyeong-si, South Korea

Cheol-woo Lee