Georgia Tech Research Corporation

Chenyun Pan

Azad Naeemi

Sourav Dutta

An anti-ferromagnetic (AFM) voltage-controlled field effect logic device structure can include an AFM material that extends in a first direction and an input voltage terminal that extends opposite the AFM material. An oxide material can be located between the AFM material and the input voltage terminal. A first spin orbital coupling (SOC) material can extend in a second direction across the AFM material to provide a first SOC channel with a drain voltage terminal at a first end of the first SOC channel and an output voltage terminal at a second end of the first SOC channel that is opposite the first end. A contact can be electrically coupled to the output voltage terminal and configured to electrically couple to a second SOC material extending in the second direction spaced apart from the first SOC material to provide a second SOC channel.

Antiferromagnet field-effect based logic circuits including spin orbital coupling channels with opposing preferred current paths and related structures

Embodiments of the present invention relate generally to logic devices, and more particularly, to magnetoelectric magnetic tunneling junction computational devices. Aspects of the disclosed technology include a stand-alone voltage-controlled magnetoelectric device that satisfies essential requirements for general logic applications, including nonlinearity, gain, concatenability, feedback prevention, and a complete set of Boolean operations based on the majority gate and inverter. Aspects of the present disclosed technology can eliminate the need for any auxiliary FETs to preset or complicated clocking schemes and prevents the racing condition.

Magnetoelectric computational devices

Embodiments of the present invention relate generally to logic devices, and more particularly, to magnetoelectric magnetic tunneling junction computational devices. Aspects of the disclosed technology include a stand-alone voltage-controlled magnetoelectric device that satisfies essential requirements for general logic applications, including nonlinearity, gain, concatenability, feedback prevention, and a complete set of Boolean operations based on the majority gate and inverter. Aspects of the present disclosed technology can eliminate the need for any auxiliary FETs to preset or complicated clocking schemes, and prevents the racing condition.

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Atlanta, GA, United States of America

Chenyun Pan